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conv_bias.cpp 53 kB

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  1. /**
  2. * \file dnn/test/cuda/conv_bias.cpp
  3. * MegEngine is Licensed under the Apache License, Version 2.0 (the "License")
  4. *
  5. * Copyright (c) 2014-2021 Megvii Inc. All rights reserved.
  6. *
  7. * Unless required by applicable law or agreed to in writing,
  8. * software distributed under the License is distributed on an
  9. * "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  10. */
  11. #include "megdnn/dtype.h"
  12. #include "test/cuda/fixture.h"
  13. #include "megdnn/opr_param_defs.h"
  14. #include "megdnn/oprs.h"
  15. #include "src/cuda/handle.h"
  16. #include "test/common/benchmarker.h"
  17. #include "test/common/checker.h"
  18. #include "test/common/conv_bias.h"
  19. #include "test/common/rng.h"
  20. #include "test/common/tensor.h"
  21. #include "test/common/workspace_wrapper.h"
  22. #include "test/cuda/utils.h"
  23. using namespace megdnn;
  24. using namespace test;
  25. using namespace conv_bias;
  26. namespace {
  27. #if CUDA_VERSION >= 10000
  28. void test_conv_bias_forward_wmma_int4_nchw8(Handle* handle_cuda, size_t fh) {
  29. require_compute_capability(7, 5);
  30. using namespace conv_bias;
  31. Checker<ConvBiasForward> checker(handle_cuda);
  32. UniformIntRNG int_rng{0, 8};
  33. ConvBias::Param param;
  34. param.format = ConvBias::Param::Format::NCHW8;
  35. using NonlineMode = ConvBias::Param::NonlineMode;
  36. for (NonlineMode mode : {NonlineMode::RELU}) {
  37. for (size_t batch : {1}) {
  38. for (size_t ic : {128, 32}) {
  39. for (size_t oc : {32}) {
  40. for (int ph : {static_cast<int>(fh / 2), 0}) {
  41. for (size_t ih : {8, 9, 13, 15, 16}) {
  42. for (size_t iw : {8, 16, 24, 32, 40}) {
  43. param.nonlineMode = mode;
  44. param.stride_h = param.stride_w = 1;
  45. param.pad_h = param.pad_w = ph;
  46. checker.set_dtype(0,
  47. dtype::Quantized4Asymm(
  48. 1.3f, (uint8_t)(1)))
  49. .set_dtype(1,
  50. dtype::Quantized4Asymm(
  51. 1.3f, (uint8_t)(2)))
  52. .set_dtype(2, dtype::QuantizedS32(1.3f *
  53. 1.3f))
  54. .set_dtype(4, dtype::QuantizedS32(1.3f *
  55. 1.3f))
  56. .set_rng(0, &int_rng)
  57. .set_rng(1, &int_rng)
  58. .set_rng(2, &int_rng)
  59. .set_param(param);
  60. if (!ph)
  61. iw += 2 * (fh / 2);
  62. size_t oh = infer_conv_shape(ih, fh, 1, ph);
  63. size_t ow = infer_conv_shape(iw, fh, 1, ph);
  64. if (ow % 8 != 0)
  65. continue;
  66. checker.execs({{batch, ic / 8, ih, iw, 8},
  67. {oc, ic / 8, fh, fh, 8},
  68. {1, oc / 8, 1, 1, 8},
  69. {},
  70. {}});
  71. checker.execs({{batch, ic / 8, ih, iw, 8},
  72. {oc, ic / 8, fh, fh, 8},
  73. {batch, oc / 8, oh, ow, 8},
  74. {},
  75. {}});
  76. }
  77. }
  78. }
  79. }
  80. }
  81. }
  82. }
  83. }
  84. #endif
  85. } // namespace
  86. #if CUDNN_VERSION >= 7400
  87. TEST_F(CUDA, CONV_BIAS_FORWARD_F32) {
  88. using namespace conv_bias;
  89. std::vector<TestArg> args = get_args();
  90. Checker<ConvBiasForward> checker(handle_cuda());
  91. NormalRNG default_rng;
  92. for (auto&& arg : args) {
  93. checker.set_dtype(0, dtype::Float32())
  94. .set_dtype(1, dtype::Float32())
  95. .set_dtype(2, dtype::Float32())
  96. .set_rng(0, &default_rng)
  97. .set_rng(1, &default_rng)
  98. .set_rng(2, &default_rng)
  99. .set_epsilon(1e-3)
  100. .set_param(arg.param)
  101. .execs({arg.src, arg.filter, arg.bias, {}, {}});
  102. }
  103. }
  104. TEST_F(CUDA, CONV_BIAS_FORWARD_BF16) {
  105. using namespace conv_bias;
  106. std::vector<TestArg> args = get_args();
  107. Checker<ConvBiasForward> checker(handle_cuda());
  108. checker.set_before_exec_callback(
  109. AlgoChecker<ConvBiasForward>(ExecutionPolicyAlgoName{
  110. "CONVBIAS_BFLOAT16", {{"MATMUL", {}}}}));
  111. NormalRNG default_rng;
  112. for (auto&& arg : args) {
  113. arg.param.compute_mode = param::Convolution::ComputeMode::FLOAT32;
  114. checker.set_dtype(0, dtype::BFloat16())
  115. .set_dtype(1, dtype::BFloat16())
  116. .set_dtype(2, dtype::BFloat16())
  117. .set_dtype(3, dtype::BFloat16())
  118. .set_dtype(4, dtype::BFloat16())
  119. .set_rng(0, &default_rng)
  120. .set_rng(1, &default_rng)
  121. .set_rng(2, &default_rng)
  122. .set_epsilon(2e-2)
  123. .set_param(arg.param)
  124. .execs({arg.src, arg.filter, arg.bias, {}, {}});
  125. }
  126. }
  127. TEST_F(CUDA, CONV_BIAS_FORWARD_QS8) {
  128. require_compute_capability(6, 1);
  129. UniformIntRNG int_rng{-50, 50};
  130. Checker<ConvBiasForward> checker(handle_cuda());
  131. ConvBias::Param param;
  132. param.format = ConvBias::Param::Format::NHWC;
  133. param.nonlineMode = ConvBias::Param::NonlineMode::IDENTITY;
  134. {
  135. auto src_shape = TensorShape{20, 224, 224, 4};
  136. auto filter_shape = TensorShape{24, 1, 1, 4};
  137. auto bias_shape = TensorShape{1, 1, 1, 24};
  138. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  139. .set_dtype(1, dtype::QuantizedS8(2.5f))
  140. .set_dtype(2, dtype::QuantizedS32(6.25f))
  141. .set_dtype(4, dtype::QuantizedS8(60.25f))
  142. .set_rng(0, &int_rng)
  143. .set_rng(1, &int_rng)
  144. .set_rng(2, &int_rng)
  145. .set_param(param)
  146. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  147. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  148. .set_dtype(1, dtype::QuantizedS8(2.5f))
  149. .set_dtype(2, dtype::QuantizedS32(6.25f))
  150. .set_dtype(4, dtype::QuantizedS8(40.25f))
  151. .set_rng(0, &int_rng)
  152. .set_rng(1, &int_rng)
  153. .set_rng(2, &int_rng)
  154. .set_param(param)
  155. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  156. }
  157. {
  158. auto src_shape = TensorShape{20, 224, 224, 4};
  159. auto filter_shape = TensorShape{24, 1, 1, 4};
  160. auto bias_shape = TensorShape{1, 1, 1, 24};
  161. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  162. .set_dtype(1, dtype::QuantizedS8(2.5f))
  163. .set_dtype(2, dtype::QuantizedS32(6.25f))
  164. .set_dtype(4, dtype::QuantizedS8(60.25f))
  165. .set_rng(0, &int_rng)
  166. .set_rng(1, &int_rng)
  167. .set_rng(2, &int_rng)
  168. .set_param(param)
  169. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  170. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  171. .set_dtype(1, dtype::QuantizedS8(2.5f))
  172. .set_dtype(2, dtype::QuantizedS32(6.25f))
  173. .set_dtype(4, dtype::QuantizedS8(40.25f))
  174. .set_rng(0, &int_rng)
  175. .set_rng(1, &int_rng)
  176. .set_rng(2, &int_rng)
  177. .set_param(param)
  178. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  179. }
  180. {
  181. param.sparse = ConvBias::Param::Sparse::GROUP;
  182. auto src_shape = TensorShape{20, 224, 224, 16};
  183. auto filter_shape = TensorShape{4, 4, 1, 1, 4};
  184. auto bias_shape = TensorShape{1, 1, 1, 16};
  185. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  186. .set_dtype(1, dtype::QuantizedS8(2.5f))
  187. .set_dtype(2, dtype::QuantizedS32(6.25f))
  188. .set_dtype(4, dtype::QuantizedS8(60.25f))
  189. .set_rng(0, &int_rng)
  190. .set_rng(1, &int_rng)
  191. .set_rng(2, &int_rng)
  192. .set_param(param)
  193. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  194. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  195. .set_dtype(1, dtype::QuantizedS8(2.5f))
  196. .set_dtype(2, dtype::QuantizedS32(6.25f))
  197. .set_dtype(4, dtype::QuantizedS8(40.25f))
  198. .set_rng(0, &int_rng)
  199. .set_rng(1, &int_rng)
  200. .set_rng(2, &int_rng)
  201. .set_param(param)
  202. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  203. }
  204. }
  205. TEST_F(CUDA, CONV_BIAS_NCHW_QS8) {
  206. //! not support NonlineMode::SIGMOID and NonlineMode::H_SWISH
  207. require_compute_capability(6, 1);
  208. Checker<ConvBiasForward> checker(handle_cuda());
  209. UniformIntRNG int_rng{-128, 127};
  210. using NonlineMode = ConvBias::Param::NonlineMode;
  211. ConvBias::Param param;
  212. param.format = ConvBias::Param::Format::NCHW;
  213. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  214. .set_dtype(1, dtype::QuantizedS8(2.5f))
  215. .set_dtype(2, dtype::QuantizedS32(6.25f))
  216. .set_dtype(3, dtype::QuantizedS8(0.25f))
  217. .set_dtype(4, dtype::QuantizedS8(0.25f))
  218. .set_rng(0, &int_rng)
  219. .set_rng(1, &int_rng)
  220. .set_rng(2, &int_rng)
  221. .set_rng(3, &int_rng);
  222. for (NonlineMode mode : {NonlineMode::RELU,
  223. NonlineMode::IDENTITY, NonlineMode::H_SWISH}) {
  224. for (size_t g : {1, 2}) {
  225. for (size_t b : {2}) {
  226. for (size_t ic : {6, 16}) {
  227. for (size_t oc : {4}) {
  228. for (size_t fh : {1, 3}) {
  229. for (int ph : {static_cast<int>(fh / 2)}) {
  230. for (int sh : {1, 2}) {
  231. size_t ih = 16, iw = 16;
  232. param.nonlineMode = mode;
  233. param.stride_h = param.stride_w = sh;
  234. param.pad_h = param.pad_w = ph;
  235. param.sparse =
  236. ConvBias::Param::Sparse::DENSE;
  237. checker.set_param(param)
  238. .execs({{b, ic / 2, ih, iw},
  239. {oc, ic / 2, fh, fh},
  240. {1, oc, 1, 1},
  241. {},
  242. {}});
  243. param.sparse =
  244. ConvBias::Param::Sparse::GROUP;
  245. checker.set_param(param)
  246. .execs({{b, ic, ih, iw},
  247. {g, oc/g, ic/g, fh, fh},
  248. {1, oc, 1, 1},
  249. {},
  250. {}});
  251. }
  252. }
  253. }
  254. }
  255. }
  256. }
  257. }
  258. }
  259. }
  260. #if MEGDNN_WITH_BENCHMARK
  261. TEST_F(CUDA, BENCHMARK_CONV_BIAS_NCHW4_INT8) {
  262. require_compute_capability(6, 1);
  263. Benchmarker<ConvBiasForward> bencher(handle_cuda());
  264. bencher.set_display(false);
  265. ConvBias::Param param_nchw;
  266. param_nchw.format = ConvBias::Param::Format::NCHW;
  267. ConvBias::Param param_nchw4;
  268. param_nchw4.format = ConvBias::Param::Format::NCHW4;
  269. auto i8_min = std::numeric_limits<int8_t>().min();
  270. auto i8_max = std::numeric_limits<int8_t>().max();
  271. UniformIntRNG int_rng{i8_min, i8_max};
  272. param_nchw.nonlineMode = ConvBias::Param::NonlineMode::IDENTITY;
  273. auto run_bench = [&](size_t b, size_t ci, size_t hi, size_t wi,
  274. size_t co, size_t fh, size_t fw, size_t sh,
  275. size_t sw, size_t nr_times) {
  276. param_nchw.pad_h = fh / 2;
  277. param_nchw.pad_w = fw / 2;
  278. param_nchw.stride_h = sh;
  279. param_nchw.stride_w = sw;
  280. param_nchw4.pad_h = fh / 2;
  281. param_nchw4.pad_w = fh / 2;
  282. param_nchw4.stride_h = sh;
  283. param_nchw4.stride_w = sw;
  284. bencher.set_times(nr_times)
  285. .set_dtype(0, dtype::QuantizedS8(2.5f))
  286. .set_dtype(1, dtype::QuantizedS8(2.5f))
  287. .set_dtype(2, dtype::QuantizedS32(6.25f))
  288. .set_dtype(4, dtype::QuantizedS8(0.35f))
  289. .set_rng(0, &int_rng)
  290. .set_rng(1, &int_rng)
  291. .set_rng(2, &int_rng);
  292. bencher.set_param(param_nchw);
  293. size_t ho = infer_conv_shape(hi, fh, sh, param_nchw.pad_h);
  294. size_t wo = infer_conv_shape(wi, fw, sw, param_nchw.pad_w);
  295. TensorShape inp{b, ci, hi, wi}, kern{co, ci, fh, fw},
  296. out{b, co, ho, wo};
  297. auto time_in_ms = bencher.execs(
  298. {inp, kern, {1, co, 1, 1}, {}, out}) / nr_times;
  299. auto ops_nchw = 2.0 * b * co * ho * wo * ci * fh * fw /
  300. (time_in_ms * 1e-3) * 1e-12;
  301. printf("inp=%s, kern=%s, out=%s, time: %.2fms, perf: %.2f Tops "
  302. "(NCHW)\n",
  303. inp.to_string().c_str(), kern.to_string().c_str(),
  304. out.to_string().c_str(), time_in_ms, ops_nchw);
  305. bencher.set_param(param_nchw4);
  306. decltype(ops_nchw) ops_nchw4;
  307. {
  308. TensorShape inp{b, ci / 4, hi, wi, 4},
  309. kern{co, ci / 4, fh, fw, 4}, out{b, co / 4, ho, wo, 4};
  310. auto time_in_ms = bencher.execs(
  311. {inp, kern, {1, co / 4, 1, 1, 4}, {}, out}) / nr_times;
  312. ops_nchw4 = 2.0 * b * co * ho * wo * ci * fh * fw /
  313. (time_in_ms * 1e-3) * 1e-12;
  314. printf("inp=%s, kern=%s, out=%s, time: %.2fms, perf: %.2f Tops "
  315. "(NCHW4)\n",
  316. inp.to_string().c_str(), kern.to_string().c_str(),
  317. out.to_string().c_str(), time_in_ms, ops_nchw4);
  318. }
  319. printf("speedup: %.2fx\n", ops_nchw4 / ops_nchw);
  320. };
  321. // resnet-50
  322. // bottleneck-1
  323. // proj
  324. run_bench(1, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  325. run_bench(1, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  326. run_bench(1, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  327. run_bench(1, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  328. // bottleneck-2
  329. // proj
  330. run_bench(1, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  331. run_bench(1, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  332. run_bench(1, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  333. run_bench(1, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  334. // bottleneck-3
  335. // proj
  336. run_bench(1, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  337. run_bench(1, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  338. run_bench(1, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  339. run_bench(1, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  340. // bottleneck-4
  341. // proj
  342. run_bench(1, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  343. run_bench(1, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  344. run_bench(1, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  345. run_bench(1, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  346. run_bench(32, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  347. run_bench(32, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  348. run_bench(32, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  349. run_bench(32, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  350. run_bench(32, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  351. run_bench(32, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  352. run_bench(32, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  353. run_bench(32, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  354. run_bench(32, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  355. run_bench(32, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  356. run_bench(32, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  357. run_bench(32, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  358. run_bench(32, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  359. run_bench(32, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  360. run_bench(32, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  361. run_bench(32, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  362. run_bench(256, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  363. run_bench(256, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  364. run_bench(256, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  365. run_bench(256, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  366. run_bench(256, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  367. run_bench(256, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  368. run_bench(256, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  369. run_bench(256, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  370. run_bench(256, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  371. run_bench(256, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  372. run_bench(256, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  373. run_bench(256, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  374. run_bench(256, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  375. run_bench(256, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  376. run_bench(256, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  377. run_bench(256, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  378. }
  379. #endif
  380. TEST_F(CUDA, CONV_BIAS_FORWARD_NCHW4) {
  381. require_compute_capability(6, 1);
  382. using namespace conv_bias;
  383. Checker<ConvBiasForward> checker(handle_cuda());
  384. UniformIntRNG int_rng{-5, 5};
  385. ConvBias::Param param;
  386. param.format = ConvBias::Param::Format::NCHW4;
  387. param.nonlineMode = ConvBias::Param::NonlineMode::IDENTITY;
  388. checker.set_dtype(0, dtype::QuantizedS8(0.5f))
  389. .set_dtype(1, dtype::QuantizedS8(0.5f))
  390. .set_dtype(2, dtype::QuantizedS32(0.25f))
  391. .set_dtype(3, dtype::QuantizedS8(0.13f))
  392. .set_dtype(4, dtype::QuantizedS8(0.35f))
  393. .set_rng(0, &int_rng)
  394. .set_rng(1, &int_rng)
  395. .set_rng(2, &int_rng)
  396. .set_rng(3, &int_rng)
  397. .set_param(param);
  398. auto opr = handle_cuda()->create_operator<ConvBias>();
  399. auto run = [&](const TensorShapeArray& shapes) {
  400. opr->param() = param;
  401. TensorLayout dst_layout;
  402. opr->deduce_layout({shapes[0], dtype::Float32()},
  403. {shapes[1], dtype::Float32()}, {}, {}, dst_layout);
  404. checker.execs({shapes[0], shapes[1], shapes[2], dst_layout, {}});
  405. };
  406. run({{1, 4, 4, 4, 4}, {4, 4, 3, 3, 4}, {1, 1, 1, 1, 4}});
  407. run({{20, 1, 24, 24, 4}, {24, 1, 2, 2, 4}, {1, 6, 1, 1, 4}});
  408. run({{20, 2, 24, 24, 4}, {24, 2, 3, 3, 4}, {1, 6, 1, 1, 4}});
  409. param.sparse = ConvBias::Param::Sparse::GROUP;
  410. checker.set_param(param);
  411. run({{1, 4, 24, 24, 4}, {4, 4, 1, 1, 1, 4}, {1, 4, 1, 1, 4}});
  412. run({{20, 8, 24, 24, 4}, {4, 24, 2, 2, 2, 4}, {1, 24, 1, 1, 4}});
  413. run({{1, 3, 24, 24, 4}, {3, 8, 1, 3, 3, 4}, {1, 6, 1, 1, 4}});
  414. param.pad_h = param.pad_w = 1;
  415. param.stride_h = param.stride_w = 2;
  416. checker.set_param(param);
  417. run({{10, 16, 28, 28, 4}, {8, 8, 2, 3, 3, 4}, {1, 16, 1, 1, 4}});
  418. // case which cudnn not supported
  419. param.sparse = ConvBias::Param::Sparse::DENSE;
  420. param.pad_h = param.pad_w = 1;
  421. param.stride_h = param.stride_w = 1;
  422. checker.set_param(param);
  423. checker.exec({{1, 4, 2, 2, 4}, {16, 4, 3, 3, 4}, {1, 4, 1, 1, 4}, {}, {}});
  424. }
  425. TEST_F(CUDA, CONV_BIAS_FORWARD_NCHW4_NCHW) {
  426. require_compute_capability(6, 1);
  427. using namespace conv_bias;
  428. Checker<ConvBiasForward> checker(handle_cuda());
  429. UniformIntRNG int_rng{-3, 3};
  430. UniformFloatRNG float_rng{-50, 50};
  431. ConvBias::Param param;
  432. param.format = ConvBias::Param::Format::NCHW4_NCHW;
  433. param.nonlineMode = ConvBias::Param::NonlineMode::IDENTITY;
  434. checker.set_dtype(0, dtype::QuantizedS8(1.9980618f))
  435. .set_dtype(1, dtype::QuantizedS8(1.9980927f))
  436. .set_dtype(2, dtype::Float32())
  437. .set_dtype(3, dtype::Float32())
  438. .set_dtype(4, dtype::Float32())
  439. .set_rng(0, &int_rng)
  440. .set_rng(1, &int_rng)
  441. .set_rng(2, &float_rng)
  442. .set_rng(3, &float_rng)
  443. .set_param(param);
  444. auto opr = handle_cuda()->create_operator<ConvBias>();
  445. auto run = [&](const TensorShapeArray& shapes) {
  446. opr->param() = param;
  447. TensorLayout dst_layout;
  448. opr->deduce_layout({shapes[0], dtype::Float32()},
  449. {shapes[1], dtype::Float32()}, {}, {}, dst_layout);
  450. checker.execs({shapes[0], shapes[1], shapes[2], dst_layout, {}});
  451. };
  452. run({{1, 4, 4, 4, 4}, {4, 4, 3, 3, 4}, {1, 4, 1, 1}});
  453. run({{20, 1, 24, 24, 4}, {24, 1, 2, 2, 4}, {1, 24, 1, 1}});
  454. run({{20, 2, 24, 24, 4}, {24, 2, 3, 3, 4}, {1, 24, 1, 1}});
  455. param.sparse = ConvBias::Param::Sparse::GROUP;
  456. param.nonlineMode = ConvBias::Param::NonlineMode::RELU;
  457. checker.set_param(param);
  458. run({{1, 4, 24, 24, 4}, {4, 4, 1, 1, 1, 4}, {1, 16, 1, 1}});
  459. run({{20, 8, 24, 24, 4}, {4, 24, 2, 2, 2, 4}, {1, 96, 1, 1}});
  460. run({{1, 3, 24, 24, 4}, {3, 8, 1, 3, 3, 4}, {1, 24, 1, 1}});
  461. param.pad_h = param.pad_w = 1;
  462. param.stride_h = param.stride_w = 2;
  463. checker.set_param(param);
  464. run({{10, 16, 28, 28, 4}, {8, 8, 2, 3, 3, 4}, {1, 64, 1, 1}});
  465. // case which cudnn not supported
  466. param.sparse = ConvBias::Param::Sparse::DENSE;
  467. param.pad_h = param.pad_w = 1;
  468. param.stride_h = param.stride_w = 1;
  469. param.nonlineMode = ConvBias::Param::NonlineMode::H_SWISH;
  470. checker.set_param(param);
  471. checker.exec({{1, 4, 2, 2, 4}, {16, 4, 3, 3, 4}, {1, 16, 1, 1}, {}, {}});
  472. }
  473. #endif
  474. TEST_F(CUDA, CONV_BIAS_FORWARD_CHANWISE) {
  475. Checker<ConvBiasForward> checker(handle_cuda());
  476. std::vector<TestArg> args = get_chanwise_args();
  477. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  478. ConvBiasForward::algo_name<ConvBias::DirectParam>("CHANNEL_WISE",
  479. {})
  480. .c_str()));
  481. for (auto dtype : std::vector<DType>{dtype::Float32(), dtype::Float16()}) {
  482. checker.set_dtype(0, dtype)
  483. .set_dtype(1, dtype)
  484. .set_dtype(2, dtype)
  485. .set_dtype(3, dtype)
  486. .set_dtype(4, dtype);
  487. if (dtype.enumv() == DTypeEnum::Float16)
  488. checker.set_epsilon(2e-2);
  489. for (auto&& arg : args) {
  490. checker.set_param(arg.param).execs(
  491. {arg.src, arg.filter, arg.bias, {}, {}});
  492. }
  493. }
  494. }
  495. TEST_F(CUDA, CONV_BIAS_FORWARD_CHANWISE_SMALL) {
  496. Checker<ConvBiasForward> checker(handle_cuda());
  497. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  498. ConvBiasForward::algo_name<ConvBias::DirectParam>(
  499. "CHANNEL_WISE_SMALL", {})
  500. .c_str()));
  501. param::ConvBias cur_param;
  502. using NLMode = param::ConvBias::NonlineMode;
  503. cur_param.mode = param::ConvBias::Mode::CROSS_CORRELATION;
  504. cur_param.sparse = ConvBias::Param::Sparse::GROUP;
  505. for (auto nlmode :
  506. {NLMode::IDENTITY, NLMode::RELU, NLMode::SIGMOID, NLMode::H_SWISH}) {
  507. cur_param.nonlineMode = nlmode;
  508. for (auto dtype : std::vector<DType> {
  509. dtype::Float32(),
  510. #if CUDA_VERSION >= 9000
  511. dtype::Float16()
  512. #endif
  513. }) {
  514. checker.set_dtype(0, dtype)
  515. .set_dtype(1, dtype)
  516. .set_dtype(2, dtype)
  517. .set_dtype(3, dtype)
  518. .set_dtype(4, dtype);
  519. if (dtype.enumv() == DTypeEnum::Float16)
  520. checker.set_epsilon(2e-2);
  521. for (uint32_t s : {1}) {
  522. for (uint32_t f : {1, 3, 5, 7}) {
  523. cur_param.pad_h = cur_param.pad_w = f / 2;
  524. cur_param.stride_h = cur_param.stride_w = s;
  525. checker.set_param(cur_param).execs({{2, 3, 16, 16},
  526. {3, 1, 1, f, f},
  527. {1, 3, 1, 1},
  528. {},
  529. {}});
  530. }
  531. }
  532. cur_param.pad_h = cur_param.pad_w = 1;
  533. cur_param.stride_h = cur_param.stride_w = 1;
  534. checker.set_param(cur_param)
  535. .execs({{2, 3, 3, 16},
  536. {3, 1, 1, 3, 3},
  537. {1, 3, 1, 1},
  538. {},
  539. {}})
  540. .execs({{2, 3, 8, 3},
  541. {3, 1, 1, 3, 3},
  542. {1, 3, 1, 1},
  543. {},
  544. {}});
  545. }
  546. }
  547. }
  548. TEST_F(CUDA, CONV_BIAS_FORWARD_CHANWISE_8x8x32) {
  549. require_compute_capability(6, 1);
  550. Checker<ConvBiasForward> checker(handle_cuda());
  551. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  552. ConvBiasForward::algo_name<ConvBias::DirectParam>(
  553. "CHANNEL_WISE_8X8X32", {})
  554. .c_str()));
  555. param::ConvBias cur_param;
  556. using NLMode = param::ConvBias::NonlineMode;
  557. cur_param.mode = param::ConvBias::Mode::CROSS_CORRELATION;
  558. cur_param.sparse = ConvBias::Param::Sparse::GROUP;
  559. cur_param.format = ConvBias::Param::Format::NHWC;
  560. UniformIntRNG rng(-4, 4);
  561. checker.set_dtype(0, dtype::Int8{})
  562. .set_dtype(1, dtype::Int8{})
  563. .set_dtype(2, dtype::Int32{})
  564. .set_dtype(4, dtype::Int32{})
  565. .set_rng(0, &rng)
  566. .set_rng(1, &rng)
  567. .set_rng(2, &rng);
  568. for (auto nlmode : {NLMode::IDENTITY, NLMode::RELU}) {
  569. cur_param.nonlineMode = nlmode;
  570. for (uint32_t s : {1, 2}) {
  571. for (uint32_t f : {1, 3, 5, 7}) {
  572. for (uint32_t g : {4, 8}) {
  573. cur_param.pad_h = cur_param.pad_w = f / 2;
  574. cur_param.stride_h = cur_param.stride_w = s;
  575. checker.set_param(cur_param).execs({{2, 9, 16, g},
  576. {g, 1, f, f, 1},
  577. {1, 1, 1, g},
  578. {},
  579. {}});
  580. }
  581. }
  582. }
  583. }
  584. }
  585. TEST_F(CUDA, CONV_BIAS_FORWARD_CUDNN_CONVOLUTION) {
  586. using namespace conv_bias;
  587. std::vector<TestArg> args = get_args();
  588. Checker<ConvBiasForward> checker(handle_cuda());
  589. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  590. ConvBiasForward::algo_name<ConvBias::DefaultParam>(
  591. "CUDNN:Convolution", {})
  592. .c_str()));
  593. NormalRNG default_rng;
  594. for (auto&& arg : args) {
  595. checker.set_dtype(0, dtype::Float32())
  596. .set_dtype(1, dtype::Float32())
  597. .set_dtype(2, dtype::Float32())
  598. .set_rng(0, &default_rng)
  599. .set_rng(1, &default_rng)
  600. .set_rng(2, &default_rng)
  601. .set_epsilon(1e-3)
  602. .set_param(arg.param)
  603. .execs({arg.src, arg.filter, arg.bias, {}, {}});
  604. }
  605. }
  606. TEST_F(CUDA, CONV_BIAS_FORWARD_INPLACE_MATMUL) {
  607. using namespace conv_bias;
  608. std::vector<TestArg> args = get_args();
  609. Checker<ConvBiasForward> checker(handle_cuda());
  610. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  611. ConvBiasForward::algo_name<ConvBias::MatmulParam>("INPLACE_MATMUL",
  612. {})
  613. .c_str()));
  614. param::ConvBias cur_param;
  615. using NLMode = param::ConvBias::NonlineMode;
  616. cur_param.mode = param::ConvBias::Mode::CROSS_CORRELATION;
  617. cur_param.sparse = ConvBias::Param::Sparse::DENSE;
  618. NormalRNG default_rng;
  619. checker.set_dtype(0, dtype::Float32())
  620. .set_dtype(1, dtype::Float32())
  621. .set_dtype(2, dtype::Float32())
  622. .set_rng(0, &default_rng)
  623. .set_rng(1, &default_rng)
  624. .set_rng(2, &default_rng)
  625. .set_epsilon(1e-3);
  626. for (auto nlmode :
  627. {NLMode::IDENTITY, NLMode::RELU, NLMode::SIGMOID, NLMode::H_SWISH}) {
  628. cur_param.nonlineMode = nlmode;
  629. for (uint32_t s : {1}) {
  630. for (uint32_t f : {1, 3, 5, 7}) {
  631. cur_param.pad_h = cur_param.pad_w = f / 2;
  632. cur_param.stride_h = cur_param.stride_w = s;
  633. checker.set_param(cur_param).execs(
  634. {{2, 4, 16, 16}, {4, 4, f, f}, {1, 4, 1, 1}, {}, {}});
  635. }
  636. }
  637. cur_param.pad_h = cur_param.pad_w = 1;
  638. cur_param.stride_h = cur_param.stride_w = 1;
  639. checker.set_param(cur_param)
  640. .execs({{2, 3, 3, 16}, {5, 3, 3, 3}, {1, 5, 1, 1}, {}, {}})
  641. .execs({{2, 2, 8, 3}, {3, 2, 3, 3}, {1, 3, 1, 1}, {}, {}});
  642. }
  643. }
  644. TEST_F(CUDA, CONV_BIAS_FORWARD_MATMUL) {
  645. using namespace conv_bias;
  646. std::vector<TestArg> args = get_args();
  647. Checker<ConvBiasForward> checker(handle_cuda());
  648. checker.set_before_exec_callback(
  649. AlgoChecker<ConvBiasForward>(ExecutionPolicyAlgoName{
  650. ConvBiasForward::algo_name<ConvBiasForward::MatmulParam>(
  651. "MATMUL", {})
  652. .c_str(),
  653. {{"CUBLAS", {}}}}));
  654. param::ConvBias cur_param;
  655. using NLMode = param::ConvBias::NonlineMode;
  656. cur_param.mode = param::ConvBias::Mode::CROSS_CORRELATION;
  657. cur_param.sparse = ConvBias::Param::Sparse::DENSE;
  658. NormalRNG default_rng;
  659. checker.set_dtype(0, dtype::Float32())
  660. .set_dtype(1, dtype::Float32())
  661. .set_dtype(2, dtype::Float32())
  662. .set_rng(0, &default_rng)
  663. .set_rng(1, &default_rng)
  664. .set_rng(2, &default_rng)
  665. .set_epsilon(1e-3);
  666. for (auto nlmode :
  667. {NLMode::IDENTITY, NLMode::RELU, NLMode::SIGMOID, NLMode::H_SWISH}) {
  668. cur_param.nonlineMode = nlmode;
  669. for (uint32_t s : {1}) {
  670. for (uint32_t f : {1, 3, 5, 7}) {
  671. cur_param.pad_h = cur_param.pad_w = f / 2;
  672. cur_param.stride_h = cur_param.stride_w = s;
  673. checker.set_param(cur_param).execs(
  674. {{2, 4, 16, 16}, {4, 4, f, f}, {1, 4, 1, 1}, {}, {}});
  675. }
  676. }
  677. cur_param.pad_h = cur_param.pad_w = 0;
  678. cur_param.stride_h = cur_param.stride_w = 1;
  679. checker.set_param(cur_param)
  680. .execs({{2, 3, 3, 16}, {5, 3, 3, 3}, {1, 5, 1, 1}, {}, {}})
  681. .execs({{2, 2, 8, 3}, {3, 2, 3, 3}, {1, 3, 1, 1}, {}, {}});
  682. }
  683. }
  684. TEST_F(CUDA, CONV_BIAS_FORWARD_MATMUL_8x8x32) {
  685. require_compute_capability(6, 1);
  686. Checker<ConvBiasForward> checker(handle_cuda());
  687. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  688. ConvBiasForward::algo_name<ConvBiasForward::MatmulParam>(
  689. "MATMUL8X8X32", {})
  690. .c_str()));
  691. param::ConvBias cur_param;
  692. using NLMode = param::ConvBias::NonlineMode;
  693. cur_param.mode = param::ConvBias::Mode::CROSS_CORRELATION;
  694. cur_param.sparse = ConvBias::Param::Sparse::DENSE;
  695. cur_param.format = param::ConvBias::Format::NHWC;
  696. UniformIntRNG rng{-100, 100};
  697. UniformIntRNG bias_rng{-1000, 1000};
  698. checker.set_rng(0, &rng)
  699. .set_rng(1, &rng)
  700. .set_rng(2, &bias_rng)
  701. .set_rng(3, &rng)
  702. .set_dtype(0, dtype::QuantizedS8{1.2f})
  703. .set_dtype(1, dtype::QuantizedS8{1.3f})
  704. .set_dtype(2, dtype::QuantizedS32{1.2f * 1.3f})
  705. .set_dtype(3, dtype::QuantizedS8{1.1f})
  706. .set_dtype(4, dtype::QuantizedS8{1.0f})
  707. .set_epsilon(1);
  708. for (auto nlmode : {NLMode::IDENTITY, NLMode::RELU}) {
  709. cur_param.nonlineMode = nlmode;
  710. for (uint32_t s : {1}) {
  711. for (uint32_t f : {1, 3, 5, 7}) {
  712. cur_param.pad_h = cur_param.pad_w = f / 2;
  713. cur_param.stride_h = cur_param.stride_w = s;
  714. checker.set_param(cur_param).execs(
  715. {{2, 16, 16, 4}, {4, f, f, 4}, {1, 1, 1, 4}, {}, {}});
  716. }
  717. }
  718. cur_param.pad_h = cur_param.pad_w = 0;
  719. cur_param.stride_h = cur_param.stride_w = 1;
  720. checker.set_param(cur_param)
  721. .execs({{2, 3, 16, 3}, {5, 3, 3, 3}, {1, 1, 1, 5}, {}, {}})
  722. .execs({{2, 8, 3, 2}, {3, 3, 3, 2}, {1, 1, 1, 3}, {}, {}});
  723. }
  724. }
  725. TEST_F(CUDA, CONV_BIAS_FORWARD_MATMUL_NCHW4) {
  726. require_compute_capability(6, 1);
  727. Checker<ConvBiasForward> checker(handle_cuda());
  728. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  729. ConvBiasForward::algo_name<ConvBiasForward::MatmulParam>(
  730. "MATMUL8X8X32", {})
  731. .c_str()));
  732. UniformIntRNG int_rng{-127, 127};
  733. ConvBias::Param param;
  734. param.format = ConvBias::Param::Format::NCHW4;
  735. using NLMode = ConvBias::Param::NonlineMode;
  736. checker.set_dtype(0, dtype::QuantizedS8(0.5f))
  737. .set_dtype(1, dtype::QuantizedS8(0.5f))
  738. .set_dtype(2, dtype::QuantizedS32(0.25f))
  739. .set_dtype(4, dtype::QuantizedS8(0.35f))
  740. .set_rng(0, &int_rng)
  741. .set_rng(1, &int_rng)
  742. .set_rng(2, &int_rng);
  743. param.sparse = Convolution::Param::Sparse::DENSE;
  744. param.nonlineMode = NLMode::IDENTITY;
  745. param.pad_h = param.pad_w = 1;
  746. param.stride_h = param.stride_w = 1;
  747. checker.set_param(param);
  748. checker.exec(
  749. {{8, 4, 10, 10, 4}, {16, 4, 3, 3, 4}, {1, 4, 1, 1, 4}, {}, {}});
  750. checker.exec({{1, 4, 2, 2, 4}, {16, 4, 3, 3, 4}, {1, 4, 1, 1, 4}, {}, {}});
  751. checker.exec(
  752. {{8, 64, 12, 12, 4}, {256, 64, 3, 3, 4}, {1, 64, 1, 1, 4}, {}, {}});
  753. }
  754. TEST_F(CUDA, CONV_BIAS_FORWARD_BATCHED_MATMUL) {
  755. using namespace conv_bias;
  756. std::vector<TestArg> args = get_args_1x1();
  757. Checker<ConvBiasForward> checker(handle_cuda());
  758. NormalRNG default_rng;
  759. checker.set_dtype(0, dtype::Float32())
  760. .set_dtype(1, dtype::Float32())
  761. .set_dtype(2, dtype::Float32())
  762. .set_rng(0, &default_rng)
  763. .set_rng(1, &default_rng)
  764. .set_rng(2, &default_rng)
  765. .set_epsilon(1e-3);
  766. checker.set_before_exec_callback(
  767. AlgoChecker<ConvBiasForward>(ExecutionPolicyAlgoName{
  768. ConvBiasForward::algo_name<ConvBiasForward::MatmulParam>(
  769. "BATCHED_MATMUL", {})
  770. .c_str(),
  771. {{"CUBLAS", {}}}}));
  772. for (auto&& arg : args) {
  773. checker.set_param(arg.param);
  774. checker.execs({arg.src, arg.filter, arg.bias, {}, {}});
  775. }
  776. }
  777. TEST_F(CUDA, CONV_BIAS_FORWARD_GROUP) {
  778. using NLMode = ConvBias::Param::NonlineMode;
  779. bool is_int_available = false;
  780. if (megdnn::test::check_compute_capability(6, 1)) {
  781. is_int_available = true;
  782. } else {
  783. is_int_available = false;
  784. }
  785. auto run = [&](size_t N, size_t IC, size_t IH, size_t IW, size_t FH,
  786. size_t FW, size_t OC, size_t PH, size_t PW, size_t SH,
  787. size_t SW, size_t DH, size_t DW, size_t group, NLMode mode) {
  788. {
  789. // float case
  790. Checker<ConvBiasForward> checker(handle_cuda());
  791. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<
  792. ConvBias>(
  793. ConvBiasForward::algo_name<ConvBiasForward::DirectParam>(
  794. "CUDA:GROUP_CONV", {})
  795. .c_str()));
  796. ConvBias::Param param;
  797. param.sparse = ConvBias::Param::Sparse::GROUP;
  798. param.nonlineMode = mode;
  799. param.pad_h = PH;
  800. param.pad_w = PW;
  801. param.stride_h = SH;
  802. param.stride_w = SW;
  803. param.dilate_h = DH;
  804. param.dilate_w = DW;
  805. auto ICg = IC / group;
  806. auto OCg = OC / group;
  807. checker.set_param(param).exec({{N, IC, IH, IW},
  808. {group, OCg, ICg, FH, FW},
  809. {1, OCg * group, 1, 1},
  810. {},
  811. {}});
  812. }
  813. if (is_int_available) {
  814. // int 8x8x32 case
  815. Checker<ConvBiasForward> checker(handle_cuda());
  816. ConvBias::Param param;
  817. param.sparse = Convolution::Param::Sparse::GROUP;
  818. param.format = Convolution::Param::Format::NHWC;
  819. param.nonlineMode = NLMode::IDENTITY;
  820. param.pad_h = PH;
  821. param.pad_w = PW;
  822. param.stride_h = SH;
  823. param.stride_w = SW;
  824. param.dilate_h = DH;
  825. param.dilate_w = DW;
  826. auto ICg = IC / group;
  827. auto OCg = OC / group;
  828. UniformIntRNG rng(-4, 4);
  829. checker.set_param(param)
  830. .set_dtype(0, dtype::QuantizedS8(0.5f))
  831. .set_dtype(1, dtype::QuantizedS8(0.5f))
  832. .set_dtype(2, dtype::QuantizedS32(0.25f))
  833. .set_dtype(3, dtype::QuantizedS8(0.13f))
  834. .set_dtype(4, dtype::QuantizedS8(0.35f))
  835. .set_rng(0, &rng)
  836. .set_rng(1, &rng)
  837. .set_rng(2, &rng)
  838. .exec({{N, IH, IW, IC},
  839. {group, OCg, FH, FW, ICg},
  840. {1, 1, 1, OCg * group},
  841. {},
  842. {}});
  843. }
  844. };
  845. for (NLMode nlmode :
  846. {NLMode::IDENTITY, NLMode::RELU, NLMode::SIGMOID, NLMode::H_SWISH}) {
  847. // normal case
  848. run(2, 64, 7, 7, 3, 3, 32, 0, 0, 1, 1, 1, 1, 2, nlmode);
  849. // padded case
  850. run(2, 32, 7, 7, 3, 3, 64, 1, 1, 1, 1, 1, 1, 4, nlmode);
  851. // strided case
  852. run(2, 32, 7, 7, 3, 3, 64, 0, 0, 2, 2, 1, 1, 8, nlmode);
  853. // dilated case
  854. run(2, 32, 7, 7, 3, 3, 64, 0, 0, 1, 1, 2, 2, 8, nlmode);
  855. }
  856. }
  857. #if CUDA_VERSION >= 10000
  858. TEST_F(CUDA, CONV_BIAS_FORWARD_NCHW8_PART_1) {
  859. test_conv_bias_forward_wmma_int4_nchw8(handle_cuda(), 3);
  860. }
  861. TEST_F(CUDA, CONV_BIAS_FORWARD_NCHW8_PART_2) {
  862. test_conv_bias_forward_wmma_int4_nchw8(handle_cuda(), 5);
  863. }
  864. TEST_F(CUDA, CONV_BIAS_FORWARD_NCHW8_PART_3) {
  865. test_conv_bias_forward_wmma_int4_nchw8(handle_cuda(), 7);
  866. }
  867. #if MEGDNN_WITH_BENCHMARK
  868. TEST_F(CUDA, BENCHMARK_CONV_BIAS_QUANTIZED4x4x32) {
  869. require_compute_capability(7, 5);
  870. Benchmarker<ConvBiasForward> bencher(handle_cuda());
  871. UniformIntRNG int_rng{0, 8};
  872. ConvBias::Param param;
  873. param.format = ConvBias::Param::Format::NCHW8;
  874. param.stride_h = param.stride_w = 1;
  875. using NonlineMode = ConvBias::Param::NonlineMode;
  876. param.nonlineMode = NonlineMode::RELU;
  877. auto run_bench = [&](size_t batch, size_t ci, size_t hi, size_t wi,
  878. size_t co, size_t fh, size_t fw, size_t nr_times) {
  879. param.pad_h = fh / 2;
  880. param.pad_w = fw / 2;
  881. bencher.set_param(param)
  882. .set_dtype(0, dtype::Quantized4Asymm(1.3f, (uint8_t)(1)))
  883. .set_dtype(1, dtype::Quantized4Asymm(1.3f, (uint8_t)(2)))
  884. .set_dtype(2, dtype::QuantizedS32(1.3f * 1.3f))
  885. .set_dtype(4, dtype::QuantizedS32(1.3f * 1.3f))
  886. .set_rng(0, &int_rng)
  887. .set_rng(1, &int_rng)
  888. .set_rng(2, &int_rng);
  889. bencher.set_times(nr_times);
  890. size_t ho = infer_conv_shape(hi, fh, 1, param.pad_h);
  891. size_t wo = infer_conv_shape(wi, fw, 1, param.pad_w);
  892. TensorShape inp{batch, ci / 8, hi, wi, 8}, kern{co, ci / 8, fh, fw, 8},
  893. out{batch, co / 8, ho, wo, 8};
  894. auto time_in_ms =
  895. bencher.execs({inp, kern, {1, co / 8, 1, 1, 8}, {}, out}) /
  896. nr_times;
  897. auto ops = 2.0 * batch * co * ho * wo * ci * fh * fw /
  898. (time_in_ms * 1e-3) * 1e-12;
  899. printf("inp=%s, kern=%s, out=%s, time: %.2fms, perf: %.2f Tops\n",
  900. inp.to_string().c_str(), kern.to_string().c_str(),
  901. out.to_string().c_str(), time_in_ms, ops);
  902. };
  903. run_bench(256, 256, 16, 16, 256, 3, 3, 1000);
  904. run_bench(1, 32, 224, 224, 64, 7, 7, 1000);
  905. run_bench(1, 8192, 64, 64, 4096, 3, 3, 1000);
  906. run_bench(1, 256, 64, 64, 256, 3, 3, 1000);
  907. run_bench(1, 64, 128, 128, 64, 3, 3, 1000);
  908. run_bench(1, 512, 32, 32, 512, 3, 3, 1000);
  909. run_bench(1, 1024, 16, 16, 1024, 3, 3, 1000);
  910. run_bench(1, 64, 56, 56, 64, 3, 3, 1000);
  911. run_bench(1, 128, 32, 32, 128, 3, 3, 1000);
  912. run_bench(1, 256, 16, 16, 256, 3, 3, 1000);
  913. run_bench(1, 512, 8, 8, 512, 3, 3, 1000);
  914. run_bench(32, 32, 224, 224, 64, 7, 7, 1000);
  915. run_bench(32, 64, 56, 56, 64, 3, 3, 1000);
  916. run_bench(32, 128, 32, 32, 128, 3, 3, 1000);
  917. run_bench(32, 256, 16, 16, 256, 3, 3, 1000);
  918. run_bench(32, 512, 8, 8, 512, 3, 3, 1000);
  919. run_bench(256, 32, 224, 224, 64, 7, 7, 1000);
  920. run_bench(256, 64, 56, 56, 64, 3, 3, 1000);
  921. run_bench(256, 128, 32, 32, 128, 3, 3, 1000);
  922. run_bench(256, 256, 16, 16, 256, 3, 3, 1000);
  923. run_bench(256, 512, 8, 8, 512, 3, 3, 1000);
  924. }
  925. #endif
  926. #endif
  927. TEST_F(CUDA, CONV_BIAS_FORWARD_DILATED) {
  928. require_compute_capability(6, 0);
  929. auto run = [&](size_t N, size_t IC, size_t IH, size_t IW, size_t FH,
  930. size_t FW, size_t OC, size_t PH, size_t PW, size_t SH,
  931. size_t SW, size_t DH, size_t DW) {
  932. {
  933. // float case
  934. Checker<ConvBiasForward> checker(handle_cuda());
  935. ConvBias::Param param;
  936. param.sparse = ConvBias::Param::Sparse::DENSE;
  937. param.pad_h = PH;
  938. param.pad_w = PW;
  939. param.stride_h = SH;
  940. param.stride_w = SW;
  941. param.dilate_h = DH;
  942. param.dilate_w = DW;
  943. param.nonlineMode = ConvBias::Param::NonlineMode::IDENTITY;
  944. checker.set_param(param).exec(
  945. {{N, IC, IH, IW}, {OC, IC, FH, FW}, {1, OC, 1, 1}, {}, {}});
  946. }
  947. };
  948. // dilated case
  949. run(2, 8, 7, 7, 3, 3, 4, 0, 0, 1, 1, 2, 2);
  950. }
  951. #if CUDNN_VERSION >= 7500
  952. TEST_F(CUDA, CONV_BIAS_FORWARD_TENSORCORE_INT8) {
  953. require_compute_capability(7, 5);
  954. using namespace conv_bias;
  955. Checker<ConvBiasForward> checker(handle_cuda());
  956. auto opr = handle_cuda()->create_operator<ConvBias>();
  957. auto i8_min = std::numeric_limits<int8_t>().min();
  958. auto i8_max = std::numeric_limits<int8_t>().max();
  959. UniformIntRNG int_rng{i8_min, i8_max};
  960. ConvBias::Param param;
  961. param.format = ConvBias::Param::Format::NCHW32;
  962. using NonlineMode = ConvBias::Param::NonlineMode;
  963. for (NonlineMode mode : {NonlineMode::IDENTITY, NonlineMode::RELU}) {
  964. for (size_t batch : {2}) {
  965. for (size_t ic : {64, 32}) {
  966. for (size_t oc : {32}) {
  967. for (size_t fh : {3, 5, 7}) {
  968. for (int ph : {static_cast<int>(fh / 2), 0}) {
  969. for (int sh : {1, 2}) {
  970. for (size_t ih : {9, 11, 12, 13, 16}) {
  971. for (size_t iw : {8, 27, 32, 40}) {
  972. param.nonlineMode = mode;
  973. param.stride_h = param.stride_w = sh;
  974. param.pad_h = param.pad_w = ph;
  975. opr->param() = param;
  976. TensorLayout dst_layout;
  977. opr->deduce_layout(
  978. {{batch, ic / 32, ih, iw, 32},
  979. dtype::Float32()},
  980. {{oc, ic / 32, fh, fh, 32},
  981. dtype::Float32()},
  982. {}, {}, dst_layout);
  983. checker.set_dtype(0, dtype::QuantizedS8(
  984. 1.3f))
  985. .set_dtype(1,
  986. dtype::QuantizedS8(
  987. 1.3f))
  988. .set_dtype(2,
  989. dtype::QuantizedS32(
  990. 1.3f * 1.3f))
  991. .set_dtype(3,
  992. dtype::QuantizedS8(
  993. 1.7f))
  994. .set_dtype(4,
  995. dtype::QuantizedS8(
  996. 1.2f * 1.2f))
  997. .set_rng(0, &int_rng)
  998. .set_rng(1, &int_rng)
  999. .set_rng(2, &int_rng)
  1000. .set_rng(3, &int_rng)
  1001. .set_epsilon(1 + 1e-3)
  1002. .set_param(param)
  1003. .execs({{batch, ic / 32, ih, iw,
  1004. 32},
  1005. {oc, ic / 32, fh, fh,
  1006. 32},
  1007. {1, oc / 32, 1, 1, 32},
  1008. dst_layout,
  1009. {}});
  1010. }
  1011. }
  1012. }
  1013. }
  1014. }
  1015. }
  1016. }
  1017. }
  1018. }
  1019. }
  1020. #if MEGDNN_WITH_BENCHMARK
  1021. TEST_F(CUDA, BENCHMARK_CONV_BIAS_FORWARD_TENSORCORE_INT8) {
  1022. require_compute_capability(7, 5);
  1023. Benchmarker<ConvBiasForward> bencher(handle_cuda());
  1024. bencher.set_display(false);
  1025. ConvBias::Param param;
  1026. param.format = ConvBias::Param::Format::NCHW32;
  1027. ConvBias::Param param_without_tensorcore;
  1028. param_without_tensorcore.format = ConvBias::Param::Format::NCHW4;
  1029. auto i8_min = std::numeric_limits<int8_t>().min();
  1030. auto i8_max = std::numeric_limits<int8_t>().max();
  1031. UniformIntRNG int_rng{i8_min, i8_max};
  1032. using NonlineMode = ConvBias::Param::NonlineMode;
  1033. param.nonlineMode = NonlineMode::IDENTITY;
  1034. auto run_bench = [&](size_t batch, size_t ci, size_t hi, size_t wi,
  1035. size_t co, size_t fh, size_t fw, size_t sh, size_t sw,
  1036. size_t nr_times) {
  1037. param.pad_h = fh / 2;
  1038. param.pad_w = fw / 2;
  1039. param.stride_h = sh;
  1040. param.stride_w = sw;
  1041. param_without_tensorcore.pad_h = fh / 2;
  1042. param_without_tensorcore.pad_w = fw / 2;
  1043. param_without_tensorcore.stride_h = sh;
  1044. param_without_tensorcore.stride_w = sw;
  1045. bencher.set_param(param)
  1046. .set_dtype(0, dtype::QuantizedS8(1.3f))
  1047. .set_dtype(1, dtype::QuantizedS8(1.3f))
  1048. .set_dtype(2, dtype::QuantizedS32(1.3f * 1.3f))
  1049. .set_dtype(4, dtype::QuantizedS8(1.2f))
  1050. .set_rng(0, &int_rng)
  1051. .set_rng(1, &int_rng)
  1052. .set_rng(2, &int_rng);
  1053. bencher.set_times(nr_times);
  1054. size_t ho = infer_conv_shape(hi, fh, sh, param.pad_h);
  1055. size_t wo = infer_conv_shape(wi, fw, sw, param.pad_w);
  1056. TensorShape inp{batch, ci / 32, hi, wi, 32},
  1057. kern{co, ci / 32, fh, fw, 32}, out{batch, co / 32, ho, wo, 32};
  1058. auto time_in_ms =
  1059. bencher.execs({inp, kern, {1, co / 32, 1, 1, 32}, {}, out}) /
  1060. nr_times;
  1061. auto ops = 2.0 * batch * co * ho * wo * ci * fh * fw /
  1062. (time_in_ms * 1e-3) * 1e-12;
  1063. printf("inp=%s, kern=%s, out=%s, time: %.2fms, perf: %.2f Tops "
  1064. "(TensorCore)",
  1065. inp.to_string().c_str(), kern.to_string().c_str(),
  1066. out.to_string().c_str(), time_in_ms, ops);
  1067. decltype(ops) ops_without_tensorcore;
  1068. bencher.set_param(param_without_tensorcore);
  1069. {
  1070. TensorShape inp{batch, ci / 4, hi, wi, 4},
  1071. kern{co, ci / 4, fh, fw, 4}, out{batch, co / 4, ho, wo, 4};
  1072. auto time_in_ms =
  1073. bencher.execs({inp, kern, {1, co / 4, 1, 1, 4}, {}, out}) /
  1074. nr_times;
  1075. ops_without_tensorcore = 2.0 * batch * co * ho * wo * ci * fh * fw /
  1076. (time_in_ms * 1e-3) * 1e-12;
  1077. printf(", time: %.2fms perf: %.2f Tops (without TensorCore) ",
  1078. time_in_ms, ops_without_tensorcore);
  1079. }
  1080. printf("speedup: %.2fx\n", ops / ops_without_tensorcore);
  1081. };
  1082. // resnet-50
  1083. // bottleneck-1
  1084. // proj
  1085. run_bench(1, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1086. run_bench(1, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  1087. run_bench(1, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  1088. run_bench(1, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1089. // bottleneck-2
  1090. // proj
  1091. run_bench(1, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  1092. run_bench(1, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  1093. run_bench(1, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  1094. run_bench(1, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  1095. // bottleneck-3
  1096. // proj
  1097. run_bench(1, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  1098. run_bench(1, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  1099. run_bench(1, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  1100. run_bench(1, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  1101. // bottleneck-4
  1102. // proj
  1103. run_bench(1, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  1104. run_bench(1, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  1105. run_bench(1, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  1106. run_bench(1, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  1107. run_bench(32, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1108. run_bench(32, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  1109. run_bench(32, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  1110. run_bench(32, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1111. run_bench(32, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  1112. run_bench(32, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  1113. run_bench(32, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  1114. run_bench(32, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  1115. run_bench(32, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  1116. run_bench(32, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  1117. run_bench(32, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  1118. run_bench(32, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  1119. run_bench(32, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  1120. run_bench(32, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  1121. run_bench(32, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  1122. run_bench(32, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  1123. run_bench(256, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1124. run_bench(256, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  1125. run_bench(256, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  1126. run_bench(256, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1127. run_bench(256, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  1128. run_bench(256, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  1129. run_bench(256, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  1130. run_bench(256, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  1131. run_bench(256, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  1132. run_bench(256, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  1133. run_bench(256, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  1134. run_bench(256, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  1135. run_bench(256, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  1136. run_bench(256, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  1137. run_bench(256, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  1138. run_bench(256, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  1139. }
  1140. #endif
  1141. #endif
  1142. // vim: syntax=cpp.doxygen

MegEngine 安装包中集成了使用 GPU 运行代码所需的 CUDA 环境,不用区分 CPU 和 GPU 版。 如果想要运行 GPU 程序,请确保机器本身配有 GPU 硬件设备并安装好驱动。 如果你想体验在云端 GPU 算力平台进行深度学习开发的感觉,欢迎访问 MegStudio 平台