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conv_bias.cpp 100 kB

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  1. /**
  2. * \file dnn/test/x86/conv_bias.cpp
  3. * MegEngine is Licensed under the Apache License, Version 2.0 (the "License")
  4. *
  5. * Copyright (c) 2014-2020 Megvii Inc. All rights reserved.
  6. *
  7. * Unless required by applicable law or agreed to in writing,
  8. * software distributed under the License is distributed on an
  9. * "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or
  10. * implied.
  11. */
  12. #include "src/x86/utils.h"
  13. #include "test/x86/fixture.h"
  14. #include "megdnn/opr_param_defs.h"
  15. #include "megdnn/oprs.h"
  16. #include "test/common/benchmarker.h"
  17. #include "test/common/checker.h"
  18. #include "test/common/conv_bias.h"
  19. #include "test/common/rng.h"
  20. #include "test/common/tensor.h"
  21. #include "test/common/workspace_wrapper.h"
  22. namespace megdnn {
  23. namespace test {
  24. TEST_F(X86, CONV_BIAS_FORWARD) {
  25. using namespace conv_bias;
  26. std::vector<TestArg> args = get_args();
  27. Checker<ConvBiasForward> checker(handle());
  28. NormalRNG default_rng;
  29. ConstValue const_val;
  30. for (auto&& arg : args) {
  31. checker.set_dtype(0, dtype::Float32())
  32. .set_dtype(1, dtype::Float32())
  33. .set_dtype(2, dtype::Float32())
  34. .set_rng(0, &default_rng)
  35. .set_rng(1, &default_rng)
  36. .set_rng(2, &default_rng)
  37. .set_epsilon(1e-3)
  38. .set_param(arg.param)
  39. .execs({arg.src, arg.filter, arg.bias, {}, {}});
  40. }
  41. }
  42. static void avx2_chanwise_direct_int8x8x32(Handle* handle, uint32_t stride,
  43. const char* algo) {
  44. using namespace conv_bias;
  45. std::vector<TestArg> args;
  46. auto run = [&](size_t ic, size_t w, size_t h, size_t kernel, size_t p,
  47. NonlineMode nonline_mode) {
  48. if (w + 2 * p < kernel || h + 2 * p < kernel)
  49. return;
  50. param::ConvBias param;
  51. param.stride_h = stride;
  52. param.stride_w = stride;
  53. param.pad_h = p;
  54. param.pad_w = p;
  55. param.nonlineMode = nonline_mode;
  56. param.sparse = param::ConvBias::Sparse::GROUP;
  57. //! no bias
  58. args.emplace_back(param, TensorShape{2, ic, h, w},
  59. TensorShape{ic, 1, 1, kernel, kernel}, TensorShape{});
  60. //! bias channel
  61. args.emplace_back(param, TensorShape{2, ic, h, w},
  62. TensorShape{ic, 1, 1, kernel, kernel},
  63. TensorShape{1, ic, 1, 1});
  64. };
  65. for (size_t kernel : {2, 3, 5, 7})
  66. for (size_t pad : {0, 1})
  67. for (size_t ic : {1, 5, 17, 20})
  68. for (size_t h : {7, 16, 38, 40})
  69. for (size_t w : {16, 25, 40, 55})
  70. for (NonlineMode nonline_mode : {NonlineMode::IDENTITY})
  71. run(ic, w, h, kernel, pad, nonline_mode);
  72. Checker<ConvBias> checker(handle);
  73. UniformIntRNG rng{-50, 50};
  74. checker.set_dtype(0, dtype::Int8())
  75. .set_dtype(1, dtype::Int8())
  76. .set_dtype(2, dtype::Int32())
  77. .set_dtype(4, dtype::Int32())
  78. .set_rng(0, &rng)
  79. .set_rng(1, &rng)
  80. .set_rng(2, &rng)
  81. .set_epsilon(1e-3);
  82. checker.set_before_exec_callback(
  83. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>(algo));
  84. for (auto&& arg : args) {
  85. checker.set_param(arg.param).exec(
  86. {arg.src, arg.filter, arg.bias, {}, {}});
  87. }
  88. }
  89. TEST_F(X86_MULTI_THREADS, AVX2_CHANWISE_DIRECT_STRIDE1_INT8x8x32) {
  90. avx2_chanwise_direct_int8x8x32(handle(), 1,
  91. "X86_CONV_BIAS_CHANWISE_AVX2_INT8_STRIDE1");
  92. }
  93. TEST_F(X86_MULTI_THREADS, AVX2_CHANWISE_DIRECT_STRIDE2_INT8x8x32) {
  94. avx2_chanwise_direct_int8x8x32(handle(), 2,
  95. "X86_CONV_BIAS_CHANWISE_AVX2_INT8_STRIDE2");
  96. }
  97. static void avx2_chanwise_direct_quantizeds32(Handle* handle, uint32_t stride,
  98. const char* algo) {
  99. using namespace conv_bias;
  100. std::vector<TestArg> args;
  101. auto run = [&](size_t ic, size_t w, size_t h, size_t kernel, size_t p,
  102. NonlineMode nonline_mode) {
  103. if (w + 2 * p < kernel || h + 2 * p < kernel)
  104. return;
  105. param::ConvBias param;
  106. param.stride_h = stride;
  107. param.stride_w = stride;
  108. param.pad_h = p;
  109. param.pad_w = p;
  110. param.nonlineMode = nonline_mode;
  111. param.sparse = param::ConvBias::Sparse::GROUP;
  112. //! no bias
  113. args.emplace_back(param, TensorShape{2, ic, h, w},
  114. TensorShape{ic, 1, 1, kernel, kernel}, TensorShape{});
  115. //! bias channel
  116. args.emplace_back(param, TensorShape{2, ic, h, w},
  117. TensorShape{ic, 1, 1, kernel, kernel},
  118. TensorShape{1, ic, 1, 1});
  119. };
  120. for (size_t kernel : {2, 3, 5, 7})
  121. for (size_t pad : {0, 1})
  122. for (size_t ic : {1, 3, 5, 7, 17})
  123. for (size_t h : {10, 17, 25, 30})
  124. for (size_t w : {19, 28, 58, 168})
  125. for (NonlineMode nonline_mode : {NonlineMode::IDENTITY})
  126. run(ic, w, h, kernel, pad, nonline_mode);
  127. Checker<ConvBias> checker(handle);
  128. UniformIntRNG rng{-50, 50};
  129. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  130. .set_dtype(1, dtype::QuantizedS8(2.5f))
  131. .set_dtype(2, dtype::QuantizedS32(6.25f))
  132. .set_dtype(4, {})
  133. .set_rng(0, &rng)
  134. .set_rng(1, &rng)
  135. .set_rng(2, &rng)
  136. .set_epsilon(1e-3);
  137. checker.set_before_exec_callback(
  138. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>(algo));
  139. for (auto&& arg : args) {
  140. checker.set_param(arg.param).exec(
  141. {arg.src, arg.filter, arg.bias, {}, {}});
  142. }
  143. }
  144. TEST_F(X86_MULTI_THREADS, AVX2_CHANWISE_DIRECT_STRIDE1_QuantizedS32) {
  145. avx2_chanwise_direct_quantizeds32(
  146. handle(), 1, "X86_CONV_BIAS_CHANWISE_AVX2_INT8_STRIDE1");
  147. }
  148. TEST_F(X86_MULTI_THREADS, AVX2_CHANWISE_DIRECT_STRIDE2_QuantizedS32) {
  149. avx2_chanwise_direct_quantizeds32(
  150. handle(), 2, "X86_CONV_BIAS_CHANWISE_AVX2_INT8_STRIDE2");
  151. }
  152. static void avx2_chanwise_direct_quantizeds8x8x8(Handle* handle,
  153. uint32_t stride,
  154. const char* algo) {
  155. using namespace conv_bias;
  156. std::vector<TestArg> args;
  157. auto run = [&](size_t ic, size_t w, size_t h, size_t kernel, size_t p,
  158. NonlineMode nonline_mode) {
  159. if (w + 2 * p < kernel || h + 2 * p < kernel)
  160. return;
  161. param::ConvBias param;
  162. param.stride_h = stride;
  163. param.stride_w = stride;
  164. param.pad_h = p;
  165. param.pad_w = p;
  166. param.nonlineMode = nonline_mode;
  167. param.sparse = param::ConvBias::Sparse::GROUP;
  168. //! no bias
  169. args.emplace_back(param, TensorShape{2, ic, h, w},
  170. TensorShape{ic, 1, 1, kernel, kernel}, TensorShape{});
  171. //! bias channel
  172. args.emplace_back(param, TensorShape{2, ic, h, w},
  173. TensorShape{ic, 1, 1, kernel, kernel},
  174. TensorShape{1, ic, 1, 1});
  175. };
  176. for (size_t kernel : {2, 3, 5, 7})
  177. for (size_t pad : {0, 1})
  178. for (size_t ic : {1, 3, 5, 7, 17})
  179. for (size_t h : {10, 15, 17, 30})
  180. for (size_t w : {19, 28, 58, 168})
  181. for (NonlineMode nonline_mode :
  182. {NonlineMode::IDENTITY, NonlineMode::H_SWISH,
  183. NonlineMode::RELU})
  184. run(ic, w, h, kernel, pad, nonline_mode);
  185. Checker<ConvBias> checker(handle);
  186. UniformIntRNG rng{-50, 50};
  187. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  188. .set_dtype(1, dtype::QuantizedS8(2.5f))
  189. .set_dtype(2, dtype::QuantizedS32(6.25f))
  190. .set_dtype(4, dtype::QuantizedS8(60.25f))
  191. .set_rng(0, &rng)
  192. .set_rng(1, &rng)
  193. .set_rng(2, &rng)
  194. .set_epsilon(1e-3);
  195. checker.set_before_exec_callback(
  196. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>(algo));
  197. for (auto&& arg : args) {
  198. checker.set_param(arg.param).exec(
  199. {arg.src, arg.filter, arg.bias, {}, {}});
  200. }
  201. }
  202. TEST_F(X86_MULTI_THREADS, AVX2_CHANWISE_DIRECT_STRIDE1_QuantizedS8x8x8) {
  203. avx2_chanwise_direct_quantizeds8x8x8(
  204. handle(), 1, "X86_CONV_BIAS_CHANWISE_AVX2_INT8_STRIDE1");
  205. }
  206. TEST_F(X86_MULTI_THREADS, AVX2_CHANWISE_DIRECT_STRIDE2_QuantizedS8x8x8) {
  207. avx2_chanwise_direct_quantizeds8x8x8(
  208. handle(), 2, "X86_CONV_BIAS_CHANWISE_AVX2_INT8_STRIDE2");
  209. }
  210. TEST_F(X86_MULTI_THREADS, AVX2_CONV_BIAS_DIRECT_STRIDE1_INT8x8x32) {
  211. using namespace conv_bias;
  212. std::vector<TestArg> args;
  213. auto run = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  214. size_t p, NonlineMode nonline_mode) {
  215. if (w + 2 * p < kernel || h + 2 * p < kernel)
  216. return;
  217. param::ConvBias param;
  218. param.stride_h = 1;
  219. param.stride_w = 1;
  220. param.pad_h = p;
  221. param.pad_w = p;
  222. param.nonlineMode = nonline_mode;
  223. param.sparse = param::ConvBias::Sparse::DENSE;
  224. //! no bias
  225. args.emplace_back(param, TensorShape{2, ic, h, w},
  226. TensorShape{oc, ic, kernel, kernel}, TensorShape{});
  227. param.sparse = param::ConvBias::Sparse::GROUP;
  228. //! no bias
  229. args.emplace_back(param, TensorShape{2, 2 * ic, h, w},
  230. TensorShape{2, oc / 2, ic, kernel, kernel},
  231. TensorShape{});
  232. };
  233. for (size_t kernel : {2, 3, 5, 7})
  234. for (size_t pad : {0, 1})
  235. for (size_t oc : {4, 8, 13, 16, 24})
  236. for (size_t ic : {2, 3, 7, 10})
  237. for (size_t h : {10, 11})
  238. for (size_t w : {8, 10})
  239. for (NonlineMode nonline_mode :
  240. {NonlineMode::IDENTITY})
  241. run(oc, ic, w, h, kernel, pad, nonline_mode);
  242. Checker<ConvBias> checker(handle());
  243. UniformIntRNG rng{-50, 50};
  244. checker.set_dtype(0, dtype::Int8())
  245. .set_dtype(1, dtype::Int8())
  246. .set_dtype(2, dtype::Int32())
  247. .set_dtype(4, dtype::Int32())
  248. .set_rng(0, &rng)
  249. .set_rng(1, &rng)
  250. .set_rng(2, &rng)
  251. .set_epsilon(1e-3);
  252. checker.set_before_exec_callback(
  253. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>(
  254. "X86_CONV_BIAS_DIRECT_AVX2_INT8_STRIDE1"));
  255. for (auto&& arg : args) {
  256. checker.set_param(arg.param).exec(
  257. {arg.src, arg.filter, arg.bias, {}, {}});
  258. }
  259. }
  260. TEST_F(X86_MULTI_THREADS, AVX2_CONV_BIAS_DIRECT_STRIDE1_QuantizedS32) {
  261. using namespace conv_bias;
  262. std::vector<TestArg> args;
  263. auto run = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  264. size_t p, NonlineMode nonline_mode) {
  265. if (w + 2 * p < kernel || h + 2 * p < kernel)
  266. return;
  267. param::ConvBias param;
  268. param.stride_h = 1;
  269. param.stride_w = 1;
  270. param.pad_h = p;
  271. param.pad_w = p;
  272. param.nonlineMode = nonline_mode;
  273. param.sparse = param::ConvBias::Sparse::DENSE;
  274. //! no bias
  275. args.emplace_back(param, TensorShape{2, ic, h, w},
  276. TensorShape{oc, ic, kernel, kernel}, TensorShape{});
  277. param.sparse = param::ConvBias::Sparse::GROUP;
  278. //! no bias
  279. args.emplace_back(param, TensorShape{2, 2 * ic, h, w},
  280. TensorShape{2, oc / 2, ic, kernel, kernel},
  281. TensorShape{});
  282. };
  283. for (size_t kernel : {2, 3, 5, 7})
  284. for (size_t pad : {0, 1})
  285. for (size_t oc : {4, 8, 13, 16, 24})
  286. for (size_t ic : {2, 3, 7, 10})
  287. for (size_t h : {10, 11})
  288. for (size_t w : {8, 10})
  289. for (NonlineMode nonline_mode :
  290. {NonlineMode::IDENTITY})
  291. run(oc, ic, w, h, kernel, pad, nonline_mode);
  292. Checker<ConvBias> checker(handle());
  293. UniformIntRNG rng{-50, 50};
  294. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  295. .set_dtype(1, dtype::QuantizedS8(2.5f))
  296. .set_dtype(2, dtype::QuantizedS32(6.25f))
  297. .set_dtype(4, {})
  298. .set_rng(0, &rng)
  299. .set_rng(1, &rng)
  300. .set_rng(2, &rng)
  301. .set_epsilon(1e-3);
  302. checker.set_before_exec_callback(
  303. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>(
  304. "X86_CONV_BIAS_DIRECT_AVX2_INT8_STRIDE1"));
  305. for (auto&& arg : args) {
  306. checker.set_param(arg.param).exec(
  307. {arg.src, arg.filter, arg.bias, {}, {}});
  308. }
  309. }
  310. TEST_F(X86_MULTI_THREADS, AVX2_CONV_BIAS_DIRECT_STRIDE1_S8S8S8) {
  311. using namespace conv_bias;
  312. std::vector<TestArg> args;
  313. auto run = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  314. size_t p, NonlineMode nonline_mode) {
  315. if (w + 2 * p < kernel || h + 2 * p < kernel)
  316. return;
  317. param::ConvBias param;
  318. param.stride_h = 1;
  319. param.stride_w = 1;
  320. param.pad_h = p;
  321. param.pad_w = p;
  322. param.nonlineMode = nonline_mode;
  323. param.sparse = param::ConvBias::Sparse::DENSE;
  324. //! no bias
  325. args.emplace_back(param, TensorShape{1, ic, h, w},
  326. TensorShape{oc, ic, kernel, kernel}, TensorShape{});
  327. //! bias channel
  328. args.emplace_back(param, TensorShape{1, ic, h, w},
  329. TensorShape{oc, ic, kernel, kernel},
  330. TensorShape{1, oc, 1, 1});
  331. param.sparse = param::ConvBias::Sparse::GROUP;
  332. //! no bias
  333. args.emplace_back(param, TensorShape{2, 2 * ic, h, w},
  334. TensorShape{2, oc / 2, ic, kernel, kernel},
  335. TensorShape{});
  336. //! bias channel
  337. args.emplace_back(param, TensorShape{2, 2 * ic, h, w},
  338. TensorShape{2, oc / 2, ic, kernel, kernel},
  339. TensorShape{1, oc, 1, 1});
  340. };
  341. for (size_t kernel : {2, 3, 5, 7})
  342. for (size_t pad : {0, 1})
  343. for (size_t oc : {4, 8, 14, 16, 24})
  344. for (size_t ic : {2, 3, 7, 10})
  345. for (size_t h : {10, 11})
  346. for (size_t w : {8, 10})
  347. for (NonlineMode nonline_mode :
  348. {NonlineMode::IDENTITY, NonlineMode::RELU,
  349. NonlineMode::H_SWISH})
  350. run(oc, ic, w, h, kernel, pad, nonline_mode);
  351. Checker<ConvBias> checker(handle());
  352. UniformIntRNG rng{-50, 50};
  353. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  354. .set_dtype(1, dtype::QuantizedS8(2.5f))
  355. .set_dtype(2, dtype::QuantizedS32(6.25f))
  356. .set_dtype(4, dtype::QuantizedS8(60.25f))
  357. .set_rng(0, &rng)
  358. .set_rng(1, &rng)
  359. .set_rng(2, &rng)
  360. .set_epsilon(1e-3);
  361. checker.set_before_exec_callback(
  362. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>(
  363. "X86_CONV_BIAS_DIRECT_AVX2_INT8_STRIDE1"));
  364. for (auto&& arg : args) {
  365. checker.set_param(arg.param).exec(
  366. {arg.src, arg.filter, arg.bias, {}, {}});
  367. }
  368. }
  369. TEST_F(X86_MULTI_THREADS, AVX2_CONV_BIAS_DIRECT_STRIDE2_INT8x8x32) {
  370. using namespace conv_bias;
  371. std::vector<TestArg> args;
  372. auto run = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  373. size_t p, NonlineMode nonline_mode) {
  374. if (w + 2 * p < kernel || h + 2 * p < kernel)
  375. return;
  376. param::ConvBias param;
  377. param.stride_h = 2;
  378. param.stride_w = 2;
  379. param.pad_h = p;
  380. param.pad_w = p;
  381. param.nonlineMode = nonline_mode;
  382. param.sparse = param::ConvBias::Sparse::DENSE;
  383. //! no bias
  384. args.emplace_back(param, TensorShape{2, ic, h, w},
  385. TensorShape{oc, ic, kernel, kernel}, TensorShape{});
  386. param.sparse = param::ConvBias::Sparse::GROUP;
  387. //! no bias
  388. args.emplace_back(param, TensorShape{2, 2 * ic, h, w},
  389. TensorShape{2, oc / 2, ic, kernel, kernel},
  390. TensorShape{});
  391. };
  392. for (size_t kernel : {2, 3, 5, 7})
  393. for (size_t pad : {0, 1, 2, 5})
  394. for (size_t oc : {4, 8, 13, 16, 24})
  395. for (size_t ic : {2, 3, 7, 10})
  396. for (size_t h : {10, 11})
  397. for (size_t w : {8, 10, 20})
  398. for (NonlineMode nonline_mode :
  399. {NonlineMode::IDENTITY})
  400. run(oc, ic, w, h, kernel, pad, nonline_mode);
  401. Checker<ConvBias> checker(handle());
  402. UniformIntRNG rng{-50, 50};
  403. checker.set_dtype(0, dtype::Int8())
  404. .set_dtype(1, dtype::Int8())
  405. .set_dtype(2, dtype::Int32())
  406. .set_dtype(4, dtype::Int32())
  407. .set_rng(0, &rng)
  408. .set_rng(1, &rng)
  409. .set_rng(2, &rng)
  410. .set_epsilon(1e-3);
  411. checker.set_before_exec_callback(
  412. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>(
  413. "X86_CONV_BIAS_DIRECT_AVX2_INT8_STRIDE2"));
  414. for (auto&& arg : args) {
  415. checker.set_param(arg.param).exec(
  416. {arg.src, arg.filter, arg.bias, {}, {}});
  417. }
  418. }
  419. TEST_F(X86_MULTI_THREADS, AVX2_CONV_BIAS_DIRECT_STRIDE2_QuantizedS32) {
  420. using namespace conv_bias;
  421. std::vector<TestArg> args;
  422. auto run = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  423. size_t p, NonlineMode nonline_mode) {
  424. if (w + 2 * p < kernel || h + 2 * p < kernel)
  425. return;
  426. param::ConvBias param;
  427. param.stride_h = 2;
  428. param.stride_w = 2;
  429. param.pad_h = p;
  430. param.pad_w = p;
  431. param.nonlineMode = nonline_mode;
  432. param.sparse = param::ConvBias::Sparse::DENSE;
  433. //! no bias
  434. args.emplace_back(param, TensorShape{2, ic, h, w},
  435. TensorShape{oc, ic, kernel, kernel}, TensorShape{});
  436. param.sparse = param::ConvBias::Sparse::GROUP;
  437. //! no bias
  438. args.emplace_back(param, TensorShape{2, 2 * ic, h, w},
  439. TensorShape{2, oc / 2, ic, kernel, kernel},
  440. TensorShape{});
  441. };
  442. for (size_t kernel : {2, 3, 5, 7})
  443. for (size_t pad : {0, 1, 3, 5})
  444. for (size_t oc : {4, 8, 13, 16, 24})
  445. for (size_t ic : {2, 3, 7, 10})
  446. for (size_t h : {10, 11})
  447. for (size_t w : {8, 10, 19})
  448. for (NonlineMode nonline_mode :
  449. {NonlineMode::IDENTITY})
  450. run(oc, ic, w, h, kernel, pad, nonline_mode);
  451. Checker<ConvBias> checker(handle());
  452. UniformIntRNG rng{-50, 50};
  453. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  454. .set_dtype(1, dtype::QuantizedS8(2.5f))
  455. .set_dtype(2, dtype::QuantizedS32(6.25f))
  456. .set_dtype(4, {})
  457. .set_rng(0, &rng)
  458. .set_rng(1, &rng)
  459. .set_rng(2, &rng)
  460. .set_epsilon(1e-3);
  461. checker.set_before_exec_callback(
  462. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>(
  463. "X86_CONV_BIAS_DIRECT_AVX2_INT8_STRIDE2"));
  464. for (auto&& arg : args) {
  465. checker.set_param(arg.param).exec(
  466. {arg.src, arg.filter, arg.bias, {}, {}});
  467. }
  468. }
  469. TEST_F(X86_MULTI_THREADS, AVX2_CONV_BIAS_DIRECT_STRIDE2_S8S8S8) {
  470. using namespace conv_bias;
  471. std::vector<TestArg> args;
  472. auto run = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  473. size_t p, NonlineMode nonline_mode) {
  474. if (w + 2 * p < kernel || h + 2 * p < kernel)
  475. return;
  476. param::ConvBias param;
  477. param.stride_h = 2;
  478. param.stride_w = 2;
  479. param.pad_h = p;
  480. param.pad_w = p;
  481. param.nonlineMode = nonline_mode;
  482. param.sparse = param::ConvBias::Sparse::DENSE;
  483. //! no bias
  484. args.emplace_back(param, TensorShape{1, ic, h, w},
  485. TensorShape{oc, ic, kernel, kernel}, TensorShape{});
  486. //! bias channel
  487. args.emplace_back(param, TensorShape{1, ic, h, w},
  488. TensorShape{oc, ic, kernel, kernel},
  489. TensorShape{1, oc, 1, 1});
  490. param.sparse = param::ConvBias::Sparse::GROUP;
  491. //! no bias
  492. args.emplace_back(param, TensorShape{2, 2 * ic, h, w},
  493. TensorShape{2, oc / 2, ic, kernel, kernel},
  494. TensorShape{});
  495. //! bias channel
  496. args.emplace_back(param, TensorShape{2, 2 * ic, h, w},
  497. TensorShape{2, oc / 2, ic, kernel, kernel},
  498. TensorShape{1, oc, 1, 1});
  499. };
  500. for (size_t kernel : {2, 3, 5, 7})
  501. for (size_t pad : {0, 1, 3, 5})
  502. for (size_t oc : {4, 8, 14, 16, 24})
  503. for (size_t ic : {2, 3, 7, 10})
  504. for (size_t h : {10, 11})
  505. for (size_t w : {8, 10, 18})
  506. for (NonlineMode nonline_mode :
  507. {NonlineMode::IDENTITY, NonlineMode::RELU,
  508. NonlineMode::H_SWISH})
  509. run(oc, ic, w, h, kernel, pad, nonline_mode);
  510. Checker<ConvBias> checker(handle());
  511. UniformIntRNG rng{-50, 50};
  512. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  513. .set_dtype(1, dtype::QuantizedS8(2.5f))
  514. .set_dtype(2, dtype::QuantizedS32(6.25f))
  515. .set_dtype(4, dtype::QuantizedS8(60.25f))
  516. .set_rng(0, &rng)
  517. .set_rng(1, &rng)
  518. .set_rng(2, &rng)
  519. .set_epsilon(1e-3);
  520. checker.set_before_exec_callback(
  521. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>(
  522. "X86_CONV_BIAS_DIRECT_AVX2_INT8_STRIDE2"));
  523. for (auto&& arg : args) {
  524. checker.set_param(arg.param).exec(
  525. {arg.src, arg.filter, arg.bias, {}, {}});
  526. }
  527. }
  528. TEST_F(X86_MULTI_THREADS, CONV_BIAS_DIRECT_STRIDE1_SMALL_GROUP) {
  529. using namespace conv_bias;
  530. std::vector<TestArg> args;
  531. auto run = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  532. size_t p, NonlineMode nonline_mode) {
  533. if (w + 2 * p < kernel || h + 2 * p < kernel)
  534. return;
  535. param::ConvBias param;
  536. param.stride_h = 1;
  537. param.stride_w = 1;
  538. param.pad_h = p;
  539. param.pad_w = p;
  540. param.nonlineMode = nonline_mode;
  541. //! no bias
  542. args.emplace_back(param, TensorShape{1, ic, h, w},
  543. TensorShape{oc, ic, kernel, kernel}, TensorShape{});
  544. //! bias channel
  545. args.emplace_back(param, TensorShape{2, ic, h, w},
  546. TensorShape{oc, ic, kernel, kernel},
  547. TensorShape{1, oc, 1, 1});
  548. //! bias
  549. args.emplace_back(param, TensorShape{2, ic, h, w},
  550. TensorShape{oc, ic, kernel, kernel},
  551. TensorShape{2, oc, (h + param.pad_h * 2 - kernel) + 1,
  552. (w + param.pad_w * 2 - kernel) + 1});
  553. };
  554. for (size_t kernel : {1, 2, 3, 4, 5, 6, 7})
  555. for (size_t ic : {1, 4, 8, 16})
  556. for (size_t oc : {1, 4, 8})
  557. for (size_t p : {0, 2})
  558. for (size_t size : {20, 21, 24})
  559. for (NonlineMode nonline_mode :
  560. {NonlineMode::RELU, NonlineMode::SIGMOID,
  561. NonlineMode::H_SWISH, NonlineMode::IDENTITY}) {
  562. run(oc, ic, size, size, kernel, p, nonline_mode);
  563. }
  564. Checker<ConvBias> checker(handle());
  565. UniformIntRNG rng{-50, 50};
  566. checker.set_dtype(0, dtype::Float32())
  567. .set_dtype(1, dtype::Float32())
  568. .set_dtype(2, dtype::Float32())
  569. .set_rng(0, &rng)
  570. .set_rng(1, &rng)
  571. .set_rng(2, &rng);
  572. checker.set_before_exec_callback(
  573. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>(
  574. "X86_CONV_BIAS_DIRECT_STRIDE1_SMALL_GROUP"));
  575. for (auto&& arg : args) {
  576. checker.set_param(arg.param).exec(
  577. {arg.src, arg.filter, arg.bias, {}, {}});
  578. }
  579. }
  580. TEST_F(X86_MULTI_THREADS, CONV_BIAS_DIRECT_STRIDE1_LARGE_GROUP) {
  581. using namespace conv_bias;
  582. std::vector<TestArg> args;
  583. auto run = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  584. size_t p, NonlineMode nonline_mode) {
  585. if (w + 2 * p < kernel || h + 2 * p < kernel)
  586. return;
  587. param::ConvBias param;
  588. param.stride_h = 1;
  589. param.stride_w = 1;
  590. param.pad_h = p;
  591. param.pad_w = p;
  592. param.nonlineMode = nonline_mode;
  593. //! no bias
  594. args.emplace_back(param, TensorShape{1, ic, h, w},
  595. TensorShape{oc, ic, kernel, kernel}, TensorShape{});
  596. //! bias channel
  597. args.emplace_back(param, TensorShape{2, ic, h, w},
  598. TensorShape{oc, ic, kernel, kernel},
  599. TensorShape{1, oc, 1, 1});
  600. //! bias
  601. args.emplace_back(param, TensorShape{2, ic, h, w},
  602. TensorShape{oc, ic, kernel, kernel},
  603. TensorShape{2, oc, (h + param.pad_h * 2 - kernel) + 1,
  604. (w + param.pad_w * 2 - kernel) + 1});
  605. };
  606. for (size_t kernel : {1, 2, 3, 4, 5, 6, 7})
  607. for (size_t ic : {1, 4, 8, 16})
  608. for (size_t oc : {1, 4, 8})
  609. for (size_t p : {0, 2})
  610. for (size_t size : {20, 21, 24})
  611. for (NonlineMode nonline_mode :
  612. {NonlineMode::RELU, NonlineMode::SIGMOID,
  613. NonlineMode::H_SWISH, NonlineMode::IDENTITY}) {
  614. run(oc, ic, size, size, kernel, p, nonline_mode);
  615. }
  616. Checker<ConvBias> checker(handle());
  617. UniformIntRNG rng{-50, 50};
  618. checker.set_dtype(0, dtype::Float32())
  619. .set_dtype(1, dtype::Float32())
  620. .set_dtype(2, dtype::Float32())
  621. .set_rng(0, &rng)
  622. .set_rng(1, &rng)
  623. .set_rng(2, &rng);
  624. checker.set_before_exec_callback(
  625. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>(
  626. "X86_CONV_BIAS_DIRECT_STRIDE1_LARGE_GROUP"));
  627. for (auto&& arg : args) {
  628. checker.set_param(arg.param).exec(
  629. {arg.src, arg.filter, arg.bias, {}, {}});
  630. }
  631. }
  632. TEST_F(X86_MULTI_THREADS, CONV_BIAS_DIRECT_STRIDE2) {
  633. using namespace conv_bias;
  634. std::vector<TestArg> args;
  635. auto run = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  636. size_t p, NonlineMode nonline_mode) {
  637. if (w + 2 * p < kernel || h + 2 * p < kernel)
  638. return;
  639. param::ConvBias param;
  640. param.stride_h = 2;
  641. param.stride_w = 2;
  642. param.pad_h = p;
  643. param.pad_w = p;
  644. param.nonlineMode = nonline_mode;
  645. //! no bias
  646. args.emplace_back(param, TensorShape{1, ic, h, w},
  647. TensorShape{oc, ic, kernel, kernel}, TensorShape{});
  648. };
  649. for (size_t kernel : {2, 3, 5, 7})
  650. for (size_t ic : {1, 4, 8, 16})
  651. for (size_t oc : {1, 4, 8})
  652. for (size_t p : {0, 2})
  653. for (size_t size : {20, 21, 24})
  654. for (NonlineMode nonline_mode :
  655. {NonlineMode::RELU, NonlineMode::SIGMOID,
  656. NonlineMode::H_SWISH, NonlineMode::IDENTITY}) {
  657. run(oc, ic, size, size, kernel, p, nonline_mode);
  658. }
  659. Checker<ConvBias> checker(handle());
  660. UniformIntRNG rng{-50, 50};
  661. checker.set_dtype(0, dtype::Float32())
  662. .set_dtype(1, dtype::Float32())
  663. .set_dtype(2, dtype::Float32())
  664. .set_rng(0, &rng)
  665. .set_rng(1, &rng)
  666. .set_rng(2, &rng);
  667. checker.set_before_exec_callback(
  668. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>(
  669. "X86_CONV_BIAS_DIRECT_STRIDE2_SMALL_GROUP"));
  670. for (auto&& arg : args) {
  671. checker.set_param(arg.param).exec(
  672. {arg.src, arg.filter, arg.bias, {}, {}});
  673. }
  674. checker.set_before_exec_callback(
  675. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>(
  676. "X86_CONV_BIAS_DIRECT_STRIDE2_LARGE_GROUP"));
  677. for (auto&& arg : args) {
  678. checker.set_param(arg.param).exec(
  679. {arg.src, arg.filter, arg.bias, {}, {}});
  680. }
  681. }
  682. TEST_F(X86_MULTI_THREADS, CONV_BIAS_IM2COLMATMUL_INT8X8X) {
  683. using namespace conv_bias;
  684. std::vector<TestArg> args;
  685. auto run = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  686. size_t p, NonlineMode nonline_mode) {
  687. if (w + 2 * p < kernel || h + 2 * p < kernel)
  688. return;
  689. param::ConvBias param;
  690. param.stride_h = 1;
  691. param.stride_w = 1;
  692. param.pad_h = p;
  693. param.pad_w = p;
  694. param.nonlineMode = nonline_mode;
  695. //! no bias
  696. args.emplace_back(param, TensorShape{1, ic, h, w},
  697. TensorShape{oc, ic, kernel, kernel}, TensorShape{});
  698. };
  699. for (size_t kernel : {2, 3, 4, 5, 6, 7})
  700. for (size_t ic : {1, 4, 8, 16})
  701. for (size_t oc : {1, 4, 8})
  702. for (size_t p : {0, 2})
  703. for (size_t size : {20, 21, 24})
  704. for (NonlineMode nonline_mode :
  705. {NonlineMode::IDENTITY}) {
  706. run(oc, ic, size, size, kernel, p, nonline_mode);
  707. }
  708. //! test OC block
  709. run(2046, 1, 8, 8, 2, 0, NonlineMode::IDENTITY);
  710. Checker<ConvBias> checker(handle());
  711. UniformIntRNG rng{-50, 50};
  712. #define cb(algo_name) \
  713. checker.set_before_exec_callback( \
  714. conv_bias::ConvBiasAlgoChecker<ConvBias>(algo_name)); \
  715. checker.set_dtype(0, dtype::Int8()); \
  716. checker.set_dtype(1, dtype::Int8()); \
  717. checker.set_dtype(2, dtype::Int32()); \
  718. checker.set_dtype(4, dtype::Int32()); \
  719. for (auto&& arg : args) { \
  720. checker.set_param(arg.param).execs({arg.src, arg.filter, {}, {}, {}}); \
  721. } \
  722. for (auto&& arg : args) { \
  723. checker.set_dtype(0, dtype::QuantizedS8(2.5f)) \
  724. .set_dtype(1, dtype::QuantizedS8(2.5f)) \
  725. .set_dtype(2, dtype::QuantizedS32(6.25f)) \
  726. .set_dtype(4, {}) \
  727. .set_rng(0, &rng) \
  728. .set_rng(1, &rng) \
  729. .set_rng(2, &rng) \
  730. .set_param(arg.param) \
  731. .execs({arg.src, arg.filter, {}, {}, {}}); \
  732. }
  733. #define cb2(algo_name) \
  734. checker.set_before_exec_callback( \
  735. conv_bias::ConvBiasAlgoChecker<ConvBias>(algo_name)); \
  736. checker.set_dtype(0, dtype::Int8()); \
  737. checker.set_dtype(1, dtype::Int8()); \
  738. checker.set_dtype(2, dtype::Int16()); \
  739. checker.set_dtype(4, dtype::Int16()); \
  740. for (auto&& arg : args) { \
  741. checker.set_param(arg.param).execs({arg.src, arg.filter, {}, {}, {}}); \
  742. }
  743. #if MEGDNN_X86_WITH_MKL_DNN
  744. if (megdnn::x86::is_supported(x86::SIMDType::VNNI)) {
  745. cb("IM2COLMATMUL:X86_INT8X8X32_MKLDNN");
  746. }
  747. #endif
  748. #if MEGDNN_X86_WITH_VNNI
  749. if (megdnn::x86::is_supported(x86::SIMDType::VNNI)) {
  750. cb("IM2COLMATMUL:X86_INT8X8X32_VNNI");
  751. }
  752. #endif
  753. if (megdnn::x86::is_supported(x86::SIMDType::AVX2)) {
  754. cb("IM2COLMATMUL:X86_INT8X8X32_AVX2_2X4X16");
  755. cb("IM2COLMATMUL:X86_INT8X8X32_AVX2_4X16X2");
  756. cb2("IM2COLMATMUL:X86_INT8X8X16_AVX2");
  757. }
  758. if (::megdnn::x86::is_supported(::megdnn::x86::SIMDType::SSE4_2)) {
  759. cb("IM2COLMATMUL:X86_INT8X8X32_SSE_4X8X2");
  760. }
  761. #undef cb
  762. #undef cb2
  763. }
  764. TEST_F(X86_MULTI_THREADS, CONV_BIAS_IM2COLMATMUL_FP32) {
  765. using namespace conv_bias;
  766. std::vector<TestArg> args;
  767. auto run = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  768. size_t p, NonlineMode nonline_mode) {
  769. if (w + 2 * p < kernel || h + 2 * p < kernel)
  770. return;
  771. param::ConvBias param;
  772. param.stride_h = 1;
  773. param.stride_w = 1;
  774. param.pad_h = p;
  775. param.pad_w = p;
  776. param.nonlineMode = nonline_mode;
  777. //! no bias
  778. args.emplace_back(param, TensorShape{1, ic, h, w},
  779. TensorShape{oc, ic, kernel, kernel}, TensorShape{});
  780. args.emplace_back(param, TensorShape{1, ic, h, w},
  781. TensorShape{oc, ic, kernel, kernel},
  782. TensorShape{1, oc, 1, 1});
  783. args.emplace_back(
  784. param, TensorShape{1, ic, h, w},
  785. TensorShape{oc, ic, kernel, kernel},
  786. TensorShape{1, oc, (h + 2 * p - kernel) / param.stride_h + 1,
  787. (w + 2 * p - kernel) / param.stride_w + 1});
  788. };
  789. for (size_t kernel : {2, 3, 4, 5, 6, 7})
  790. for (size_t ic : {1, 4, 8, 16})
  791. for (size_t oc : {1, 4, 8, 16, 300})
  792. for (size_t p : {0, 2})
  793. for (size_t size : {8, 24})
  794. for (NonlineMode nonline_mode :
  795. {NonlineMode::IDENTITY, NonlineMode::RELU}) {
  796. run(oc, ic, size, size, kernel, p, nonline_mode);
  797. }
  798. run(2046, 8, 20, 20, 3, 1, NonlineMode::IDENTITY);
  799. Checker<ConvBias> checker(handle());
  800. #define cb(algo_name) \
  801. checker.set_before_exec_callback( \
  802. conv_bias::ConvBiasAlgoChecker<ConvBias>(algo_name)); \
  803. for (auto&& arg : args) { \
  804. checker.set_param(arg.param).execs( \
  805. {arg.src, arg.filter, arg.bias, {}, {}}); \
  806. }
  807. #if MEGDNN_X86_WITH_MKL || MEGDNN_X86_WITH_OPENBLAS
  808. cb("IM2COLMATMUL:X86_F32_BLAS");
  809. #endif
  810. #undef cb
  811. }
  812. #if MEGDNN_X86_WITH_MKL && SUPPORT_MKL_PACKED_GEMM
  813. TEST_F(X86_MULTI_THREADS, CONV_BIAS_IM2COLMATMUL_FP32_PACKA) {
  814. using namespace conv_bias;
  815. std::vector<TestArg> args;
  816. auto run = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  817. size_t p, NonlineMode nonline_mode) {
  818. if (w + 2 * p < kernel || h + 2 * p < kernel)
  819. return;
  820. param::ConvBias param;
  821. param.stride_h = 1;
  822. param.stride_w = 1;
  823. param.pad_h = p;
  824. param.pad_w = p;
  825. param.nonlineMode = nonline_mode;
  826. //! no bias
  827. args.emplace_back(param, TensorShape{1, ic, h, w},
  828. TensorShape{oc, ic, kernel, kernel}, TensorShape{});
  829. args.emplace_back(param, TensorShape{1, ic, h, w},
  830. TensorShape{oc, ic, kernel, kernel},
  831. TensorShape{1, oc, 1, 1});
  832. args.emplace_back(
  833. param, TensorShape{1, ic, h, w},
  834. TensorShape{oc, ic, kernel, kernel},
  835. TensorShape{1, oc, (h + 2 * p - kernel) / param.stride_h + 1,
  836. (w + 2 * p - kernel) / param.stride_w + 1});
  837. param.sparse = param::ConvBias::Sparse::GROUP;
  838. args.emplace_back(param, TensorShape{1, 2 * ic, h, w},
  839. TensorShape{2, oc, ic, kernel, kernel},
  840. TensorShape{});
  841. args.emplace_back(param, TensorShape{1, 2 * ic, h, w},
  842. TensorShape{2, oc, ic, kernel, kernel},
  843. TensorShape{1, oc * 2, 1, 1});
  844. args.emplace_back(
  845. param, TensorShape{1, 2 * ic, h, w},
  846. TensorShape{2, oc, ic, kernel, kernel},
  847. TensorShape{1, 2 * oc, (h + 2 * param.pad_h - kernel) / 1 + 1,
  848. (w + 2 * param.pad_w - kernel) / 1 + 1});
  849. };
  850. for (size_t kernel : {2, 3, 4, 5, 6, 7})
  851. for (size_t ic : {1, 4, 8, 16})
  852. for (size_t oc : {1, 4, 8, 16})
  853. for (size_t p : {0, 1})
  854. for (size_t size : {8, 24})
  855. for (NonlineMode nonline_mode :
  856. {NonlineMode::IDENTITY, NonlineMode::RELU}) {
  857. run(oc, ic, size, size, kernel, p, nonline_mode);
  858. }
  859. run(2046, 8, 20, 20, 3, 1, NonlineMode::IDENTITY);
  860. Checker<ConvBias> checker(handle());
  861. #define cb(algo_name) \
  862. checker.set_before_exec_callback( \
  863. conv_bias::ConvBiasAlgoChecker<ConvBias>(algo_name)); \
  864. for (auto&& arg : args) { \
  865. checker.set_param(arg.param).execs( \
  866. {arg.src, arg.filter, arg.bias, {}, {}}); \
  867. }
  868. cb("IM2COLMATMUL:X86_F32_MKL_PACKA:192");
  869. #undef cb
  870. }
  871. /**************************** Conv1x1 PackA *************************/
  872. namespace {
  873. void checker_conv_bias(std::vector<conv_bias::TestArg> args, Handle* handle,
  874. RNG* rng, float epsilon, DType type0, DType type1,
  875. DType type2, DType type3, const char* algo_name) {
  876. using namespace conv_bias;
  877. Checker<ConvBias> checker(handle);
  878. checker.set_before_exec_callback(
  879. conv_bias::ConvBiasAlgoChecker<ConvBias>(algo_name));
  880. checker.set_dtype(0, type0);
  881. checker.set_dtype(1, type1);
  882. checker.set_dtype(2, type2);
  883. checker.set_dtype(4, type3);
  884. checker.set_epsilon(epsilon);
  885. if (NULL != rng) {
  886. checker.set_rng(0, rng).set_rng(1, rng).set_rng(2, rng).set_rng(3, rng);
  887. }
  888. for (auto&& arg : args) {
  889. checker.set_param(arg.param).execs(
  890. {arg.src, arg.filter, arg.bias, {}, {}});
  891. }
  892. }
  893. } // namespace
  894. #if MEGDNN_X86_WITH_MKL
  895. TEST_F(X86_MULTI_THREADS, CONV_BIAS_CONV1X1_S1_FP32_PACKA) {
  896. using namespace conv_bias;
  897. std::vector<conv_bias::TestArg> args = get_conv_bias_1x1_args(false, false);
  898. check_conv_bias(args, handle(), "CONV1x1:X86_F32_MKL_PACKA:24");
  899. }
  900. TEST_F(X86_MULTI_THREADS, CONV_BIAS_CONV1X1_S1_FP32_BLAS) {
  901. using namespace conv_bias;
  902. std::vector<conv_bias::TestArg> args = get_conv_bias_1x1_args(false, false);
  903. check_conv_bias(args, handle(), "CONV1x1:X86_F32_BLAS:48");
  904. }
  905. #endif
  906. TEST_F(X86_MULTI_THREADS, CONV_BIAS_CONV1X1_S1_INT8X8X32) {
  907. using namespace conv_bias;
  908. UniformIntRNG rng{-50, 50};
  909. float epsilon = 0.001;
  910. std::vector<conv_bias::TestArg> args = get_conv_bias_1x1_args(true, true);
  911. #if MEGDNN_X86_WITH_MKL_DNN
  912. if (x86::is_supported(x86::SIMDType::VNNI)) {
  913. checker_conv_bias(args, handle(), &rng, epsilon, dtype::Int8{},
  914. dtype::Int8{}, dtype::Int32{}, dtype::Int32{},
  915. "CONV1x1:X86_INT8X8X32_MKLDNN:24");
  916. }
  917. #endif
  918. #if MEGDNN_X86_WITH_VNNI
  919. if (x86::is_supported(x86::SIMDType::VNNI)) {
  920. checker_conv_bias(args, handle(), &rng, epsilon, dtype::Int8{},
  921. dtype::Int8{}, dtype::Int32{}, dtype::Int32{},
  922. "CONV1x1:X86_INT8X8X32_VNNI:24");
  923. }
  924. #endif
  925. if (x86::is_supported(x86::SIMDType::AVX2)) {
  926. checker_conv_bias(args, handle(), &rng, epsilon, dtype::Int8{},
  927. dtype::Int8{}, dtype::Int32{}, dtype::Int32{},
  928. "CONV1x1:X86_INT8X8X32_AVX2_4X16X2:24");
  929. checker_conv_bias(args, handle(), &rng, epsilon, dtype::Int8{},
  930. dtype::Int8{}, dtype::Int32{}, dtype::Int32{},
  931. "CONV1x1:X86_INT8X8X32_AVX2_2X4X16:24");
  932. }
  933. checker_conv_bias(args, handle(), &rng, epsilon, dtype::Int8{},
  934. dtype::Int8{}, dtype::Int32{}, dtype::Int32{},
  935. "CONV1x1:X86_INT8X8X32_SSE_4X8X2:48");
  936. }
  937. /************************* End Conv1x1 PackA ************************/
  938. #endif
  939. TEST_F(X86_MULTI_THREADS, CONV_BIAS_IM2COLMATMUL_QINT8) {
  940. using namespace conv_bias;
  941. std::vector<TestArg> args;
  942. auto run = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  943. size_t p, NonlineMode nonline_mode) {
  944. if (w + 2 * p < kernel || h + 2 * p < kernel)
  945. return;
  946. param::ConvBias param;
  947. param.stride_h = 1;
  948. param.stride_w = 1;
  949. param.pad_h = p;
  950. param.pad_w = p;
  951. param.nonlineMode = nonline_mode;
  952. //! no bias
  953. args.emplace_back(param, TensorShape{1, ic, h, w},
  954. TensorShape{oc, ic, kernel, kernel}, TensorShape{});
  955. //! bias channel
  956. args.emplace_back(param, TensorShape{2, ic, h, w},
  957. TensorShape{oc, ic, kernel, kernel},
  958. TensorShape{1, oc, 1, 1});
  959. };
  960. for (size_t kernel : {2, 3, 4, 5, 6, 7})
  961. for (size_t ic : {1, 4, 8, 16})
  962. for (size_t oc : {1, 4, 8})
  963. for (size_t p : {0, 2})
  964. for (size_t size : {20, 21, 24})
  965. for (NonlineMode nonline_mode :
  966. {NonlineMode::IDENTITY, NonlineMode::RELU,
  967. NonlineMode::H_SWISH}) {
  968. run(oc, ic, size, size, kernel, p, nonline_mode);
  969. }
  970. run(2046, 8, 20, 20, 3, 1, NonlineMode::IDENTITY);
  971. Checker<ConvBias> checker(handle());
  972. #define cb(algo_name) \
  973. checker.set_before_exec_callback( \
  974. conv_bias::ConvBiasAlgoChecker<ConvBias>(algo_name)); \
  975. UniformIntRNG rng{-50, 50}; \
  976. for (auto&& arg : args) { \
  977. checker.set_dtype(0, dtype::QuantizedS8(2.5f)) \
  978. .set_dtype(1, dtype::QuantizedS8(2.5f)) \
  979. .set_dtype(2, dtype::QuantizedS32(6.25f)) \
  980. .set_dtype(4, dtype::QuantizedS8(60.25)) \
  981. .set_rng(0, &rng) \
  982. .set_rng(1, &rng) \
  983. .set_rng(2, &rng) \
  984. .set_param(arg.param) \
  985. .execs({arg.src, arg.filter, {}, {}, {}}); \
  986. }
  987. #if MEGDNN_X86_WITH_MKL_DNN
  988. if (x86::is_supported(x86::SIMDType::VNNI)) {
  989. cb("IM2COLMATMUL:X86_INT8X8X32_MKLDNN");
  990. }
  991. #endif
  992. #if MEGDNN_X86_WITH_VNNI
  993. if (x86::is_supported(x86::SIMDType::VNNI)) {
  994. cb("IM2COLMATMUL:X86_INT8X8X32_VNNI");
  995. }
  996. #endif
  997. if (x86::is_supported(x86::SIMDType::AVX2)) {
  998. cb("IM2COLMATMUL:X86_INT8X8X32_AVX2_2X4X16");
  999. }
  1000. #undef cb
  1001. }
  1002. TEST_F(X86, CONV_BIAS_MATMUL) {
  1003. using namespace conv_bias;
  1004. std::vector<TestArg> args;
  1005. auto run = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  1006. size_t p, NonlineMode nonline_mode) {
  1007. if (w + 2 * p < kernel || h + 2 * p < kernel)
  1008. return;
  1009. param::ConvBias param;
  1010. param.stride_h = 1;
  1011. param.stride_w = 1;
  1012. param.pad_h = p;
  1013. param.pad_w = p;
  1014. param.nonlineMode = nonline_mode;
  1015. //! no bias
  1016. param.sparse = param::ConvBias::Sparse::DENSE;
  1017. args.emplace_back(param, TensorShape{1, ic, h, w},
  1018. TensorShape{oc, ic, kernel, kernel}, TensorShape{});
  1019. //! bias channel
  1020. args.emplace_back(param, TensorShape{2, ic, h, w},
  1021. TensorShape{oc, ic, kernel, kernel},
  1022. TensorShape{1, oc, 1, 1});
  1023. //! bias
  1024. args.emplace_back(param, TensorShape{2, ic, h, w},
  1025. TensorShape{oc, ic, kernel, kernel},
  1026. TensorShape{2, oc, (h + param.pad_h * 2 - kernel) + 1,
  1027. (w + param.pad_w * 2 - kernel) + 1});
  1028. //! gruop
  1029. param.sparse = param::ConvBias::Sparse::GROUP;
  1030. args.emplace_back(
  1031. param, TensorShape{2, 2 * ic, h, w},
  1032. TensorShape{2, oc, ic, kernel, kernel},
  1033. TensorShape{2, 2 * oc, (h + param.pad_h * 2 - kernel) + 1,
  1034. (w + param.pad_w * 2 - kernel) + 1});
  1035. };
  1036. for (size_t kernel : {2, 3, 5, 7})
  1037. for (size_t ic : {1, 2, 3, 4})
  1038. for (size_t oc : {1, 2, 3, 4})
  1039. for (size_t p : {0, 2})
  1040. for (size_t size : {20, 21, 22, 23, 24})
  1041. for (NonlineMode nonline_mode :
  1042. {NonlineMode::RELU, NonlineMode::SIGMOID,
  1043. NonlineMode::H_SWISH, NonlineMode::IDENTITY}) {
  1044. run(oc, ic, size, size, kernel, p, nonline_mode);
  1045. }
  1046. Checker<ConvBias> checker(handle());
  1047. checker.set_before_exec_callback(
  1048. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>(
  1049. "X86_CONV_BIAS_MATMUL"));
  1050. checker.set_epsilon(1);
  1051. UniformIntRNG rng{-50, 50};
  1052. checker.set_dtype(0, dtype::Float32())
  1053. .set_dtype(1, dtype::Float32())
  1054. .set_dtype(2, dtype::Float32())
  1055. .set_rng(0, &rng)
  1056. .set_rng(1, &rng)
  1057. .set_rng(2, &rng);
  1058. for (auto&& arg : args) {
  1059. checker.set_param(arg.param).exec(
  1060. {arg.src, arg.filter, arg.bias, {}, {}});
  1061. }
  1062. }
  1063. #if MEGDNN_WITH_BENCHMARK
  1064. #if MEGDNN_X86_WITH_MKL_DNN
  1065. static void x86_benchmark_fp32_mkldnn(Handle* handle) {
  1066. constexpr size_t RUNS = 30;
  1067. param::ConvBias param;
  1068. Benchmarker<ConvBias> benchmarker_mkldnn(handle);
  1069. benchmarker_mkldnn.set_display(false).set_times(RUNS);
  1070. benchmarker_mkldnn.set_before_exec_callback(
  1071. AlgoChecker<ConvBias>("MKLDNN_CONV_FP32"));
  1072. Benchmarker<ConvBias> benchmarker_im2col(handle);
  1073. benchmarker_im2col.set_display(false).set_times(RUNS);
  1074. benchmarker_im2col.set_before_exec_callback(
  1075. AlgoChecker<ConvBias>("IM2COLMATMUL.+"));
  1076. auto run = [&](size_t N, size_t IC, size_t OC, size_t H, size_t W,
  1077. size_t FS, size_t SZ, size_t GROUP = 1) {
  1078. TensorShape src({N, IC, H, W}), filter({OC, IC, FS, FS}),
  1079. bias({1, OC, 1, 1}), z({}), dst({N, OC, H / SZ, W / SZ});
  1080. param.pad_h = FS / 2;
  1081. param.pad_w = FS / 2;
  1082. param.stride_h = SZ;
  1083. param.stride_w = SZ;
  1084. param.format = param::ConvBias::Format::NCHW;
  1085. param.sparse = param::ConvBias::Sparse::DENSE;
  1086. if (GROUP > 1) {
  1087. param.sparse = param::ConvBias::Sparse::GROUP;
  1088. filter = {GROUP, OC / GROUP, IC / GROUP, FS, FS};
  1089. }
  1090. auto im2col_used = benchmarker_im2col.set_param(param).exec(
  1091. {src, filter, bias, z, dst}) /
  1092. RUNS;
  1093. src = IC < 8 ? TensorShape{N, IC, H, W}
  1094. : TensorShape{N, IC / 8, H, W, 8};
  1095. filter = IC < 8 ? TensorShape{OC / 8, FS, FS, IC, 8}
  1096. : TensorShape{OC / 8, IC / 8, FS, FS, 8, 8};
  1097. if (GROUP > 1 && OC == GROUP && IC == GROUP) {
  1098. filter = {GROUP / 8, 1, 1, FS, FS, 8};
  1099. } else if (GROUP > 1 && OC / GROUP % 8 == 0 && IC / GROUP % 8 == 0) {
  1100. filter = {GROUP, OC / GROUP / 8, IC / GROUP / 8, FS, FS, 8, 8};
  1101. }
  1102. bias = {1, OC / 8, 1, 1, 8};
  1103. z = {};
  1104. dst = {N, OC / 8, H / SZ, W / SZ, 8};
  1105. param.format = param::ConvBias::Format::NCHW88;
  1106. auto mkldnn_used = benchmarker_mkldnn.set_param(param).exec(
  1107. {src, filter, bias, z, dst}) /
  1108. RUNS;
  1109. float computations =
  1110. (IC / GROUP * FS * FS + 1) * dst.total_nr_elems() * 2 * 1e-6;
  1111. std::cout << "run " << src.to_string() << " " << filter.to_string()
  1112. << " " << bias.to_string() << " " << dst.to_string()
  1113. << std::endl;
  1114. std::cout << "im2col: " << im2col_used << " ms, "
  1115. << (computations / im2col_used) << " Gops, ";
  1116. std::cout << "mkldnn: " << mkldnn_used << " ms, "
  1117. << (computations / mkldnn_used) << " Gops, "
  1118. << "spped up: " << (im2col_used / mkldnn_used) << ", ";
  1119. std::cout << std::endl;
  1120. };
  1121. run(1, 64, 64, 56, 56, 3, 1);
  1122. run(1, 3, 64, 224, 224, 3, 1);
  1123. run(1, 3, 64, 224, 224, 7, 2);
  1124. run(1, 64, 64, 56, 56, 3, 1);
  1125. run(1, 128, 128, 28, 28, 3, 1);
  1126. run(1, 256, 256, 14, 14, 3, 1);
  1127. run(1, 512, 512, 7, 7, 3, 1);
  1128. run(1, 256, 64, 56, 56, 1, 1);
  1129. run(1, 512, 128, 28, 28, 1, 1);
  1130. run(1, 1024, 256, 14, 14, 1, 1);
  1131. run(1, 2048, 512, 7, 7, 1, 1);
  1132. run(1, 32, 32, 112, 112, 3, 1, 32);
  1133. run(1, 144, 144, 56, 56, 3, 1, 144);
  1134. run(1, 192, 192, 28, 28, 3, 1, 192);
  1135. run(1, 384, 384, 28, 28, 3, 1, 384);
  1136. run(1, 576, 576, 14, 14, 3, 1, 576);
  1137. run(1, 960, 960, 7, 7, 3, 1, 960);
  1138. run(1, 256, 128, 56, 56, 1, 2, 1);
  1139. run(1, 512, 256, 28, 28, 1, 2, 1);
  1140. run(1, 1024, 512, 14, 14, 1, 2, 1);
  1141. run(1, 96, 96, 112, 112, 3, 2, 96);
  1142. run(1, 144, 144, 56, 56, 3, 2, 144);
  1143. run(1, 384, 384, 28, 28, 3, 2, 384);
  1144. run(1, 576, 576, 14, 14, 3, 2, 576);
  1145. }
  1146. TEST_F(X86, BENCHMARK_CONVBIAS_FP32_MKLDNN) {
  1147. x86_benchmark_fp32_mkldnn(handle());
  1148. }
  1149. TEST_F(X86_MULTI_THREADS, BENCHMARK_CONVBIAS_FP32_MKLDNN) {
  1150. x86_benchmark_fp32_mkldnn(handle());
  1151. }
  1152. #endif
  1153. #endif
  1154. /************************* Winograd ****************************/
  1155. namespace {
  1156. std::vector<conv_bias::TestArg> get_winograd_mk_nchw88_args() {
  1157. std::vector<conv_bias::TestArg> args;
  1158. param::ConvBias cur_param;
  1159. cur_param.format = param::ConvBias::Format::NCHW88;
  1160. using NLMode = param::ConvBias::NonlineMode;
  1161. // clang-format off
  1162. for (auto nlmode :
  1163. {NLMode::IDENTITY, NLMode::RELU, NLMode::SIGMOID, NLMode::H_SWISH}) {
  1164. for (size_t ic : {1, 2}) {
  1165. for (size_t oc : {1, 2}) {
  1166. for (size_t i : {9, 63}) {
  1167. cur_param.mode = param::ConvBias::Mode::CROSS_CORRELATION;
  1168. cur_param.nonlineMode = nlmode;
  1169. cur_param.sparse = param::ConvBias::Sparse::DENSE;
  1170. cur_param.pad_h = cur_param.pad_w = 1;
  1171. args.emplace_back(cur_param, TensorShape{1, ic, i, i, 8},
  1172. TensorShape{oc, ic, 3, 3, 8, 8},
  1173. TensorShape{1, oc, 1, 1, 8});
  1174. args.emplace_back(cur_param, TensorShape{1, ic, i, i, 8},
  1175. TensorShape{oc, ic, 3, 3, 8, 8},TensorShape{});
  1176. //! bias
  1177. args.emplace_back(cur_param, TensorShape{2, ic, i, i, 8},
  1178. TensorShape{oc, ic, 3, 3, 8, 8}, TensorShape{2, oc, i, i, 8});
  1179. /*cur_param.sparse = param::ConvBias::Sparse::GROUP;
  1180. args.emplace_back(cur_param, TensorShape{2, 2 * ic, i, i, 8},
  1181. TensorShape{2, oc, ic, 3, 3, 8, 8},
  1182. TensorShape{1, 2 * oc, 1, 1, 8});*/
  1183. }}}
  1184. // clang-format on
  1185. //! test for multi-thread OC parallel
  1186. cur_param.sparse = param::ConvBias::Sparse::DENSE;
  1187. cur_param.pad_h = cur_param.pad_w = 1;
  1188. args.emplace_back(cur_param, TensorShape{2, 1, 9, 9, 8},
  1189. TensorShape{128, 1, 3, 3, 8, 8},
  1190. TensorShape{1, 128, 1, 1, 8});
  1191. /*cur_param.sparse = param::ConvBias::Sparse::GROUP;
  1192. args.emplace_back(cur_param, TensorShape{2, 2, 9, 9, 8},
  1193. TensorShape{2, 128, 1, 3, 3, 8, 8},
  1194. TensorShape{1, 2 * 128, 1, 1, 8});*/
  1195. }
  1196. return args;
  1197. }
  1198. } // namespace
  1199. TEST_F(X86_MULTI_THREADS, CONV_BIAS_WINOGRAD_NCHW88_F63) {
  1200. using namespace conv_bias;
  1201. std::vector<TestArg> args = get_winograd_mk_nchw88_args();
  1202. Checker<ConvBiasForward> checker(handle());
  1203. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  1204. ssprintf("WINOGRAD:X86_F32MK8_8X8:8:6").c_str()));
  1205. for (auto&& arg : args) {
  1206. checker.set_param(arg.param).execs(
  1207. {arg.src, arg.filter, arg.bias, {}, {}});
  1208. }
  1209. }
  1210. TEST_F(X86_MULTI_THREADS, CONV_BIAS_WINOGRAD_NCHW88_F23) {
  1211. using namespace conv_bias;
  1212. std::vector<TestArg> args = get_winograd_mk_nchw88_args();
  1213. Checker<ConvBiasForward> checker(handle());
  1214. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  1215. ssprintf("WINOGRAD:X86_F32MK8_8X8:8:2").c_str()));
  1216. for (auto&& arg : args) {
  1217. checker.set_param(arg.param).execs(
  1218. {arg.src, arg.filter, arg.bias, {}, {}});
  1219. }
  1220. }
  1221. TEST_F(X86_MULTI_THREADS, CONV_BIAS_WINOGRAD_WEIGHT_PREPROCESS) {
  1222. using namespace conv_bias;
  1223. std::vector<TestArg> args = get_winograd_mk_nchw88_args();
  1224. Checker<ConvBiasForward> checker(handle());
  1225. auto extra_impl = [](const TensorNDArray& tensors, uint32_t m,
  1226. param::ConvBias param, Handle* handle) {
  1227. megdnn_assert(param.format == param::ConvBias::Format::NCHW88);
  1228. auto winograd_preprocess_opr =
  1229. handle->create_operator<WinogradFilterPreprocess>();
  1230. winograd_preprocess_opr->param().output_block_size = m;
  1231. winograd_preprocess_opr->param().format = param::MatrixMul::Format::MK8;
  1232. TensorLayout filter_transform_layout;
  1233. winograd_preprocess_opr->deduce_layout(tensors[1].layout,
  1234. filter_transform_layout);
  1235. size_t winograd_preprocess_workspace_in_bytes =
  1236. winograd_preprocess_opr->get_workspace_in_bytes(
  1237. tensors[1].layout, filter_transform_layout);
  1238. auto conv_bias_opr = handle->create_operator<ConvBias>();
  1239. conv_bias_opr->param() = param;
  1240. conv_bias_opr->param().format =
  1241. param::ConvBias::Format::NCHW88_WINOGRAD;
  1242. conv_bias_opr->param().output_block_size = m;
  1243. size_t conv_bias_workspace_in_bytes =
  1244. conv_bias_opr->get_workspace_in_bytes(
  1245. tensors[0].layout, filter_transform_layout,
  1246. tensors[2].layout, tensors[3].layout, tensors[4].layout,
  1247. nullptr);
  1248. WorkspaceBundle wb(nullptr, {filter_transform_layout.span().dist_byte(),
  1249. conv_bias_workspace_in_bytes,
  1250. winograd_preprocess_workspace_in_bytes});
  1251. wb.set(malloc(wb.total_size_in_bytes()));
  1252. TensorND filter_transform_tensor(wb.get(0),
  1253. std::move(filter_transform_layout));
  1254. winograd_preprocess_opr->exec(tensors[1], filter_transform_tensor,
  1255. wb.get_workspace(2));
  1256. conv_bias_opr->exec(tensors[0], filter_transform_tensor, tensors[2],
  1257. tensors[3], tensors[4], nullptr,
  1258. wb.get_workspace(1));
  1259. free(wb.ptr());
  1260. };
  1261. auto run = [&checker, &extra_impl](
  1262. Handle* handle, const std::vector<TestArg>& args,
  1263. const std::vector<size_t>& out_size, DType A_dtype,
  1264. DType B_dtype, DType C_dtype, DType D_dtype,
  1265. const float eps) {
  1266. for (auto&& arg : args) {
  1267. for (uint32_t m : out_size) {
  1268. checker.set_extra_opr_impl(std::bind(extra_impl,
  1269. std::placeholders::_1, m,
  1270. arg.param, handle));
  1271. checker.set_dtype(0, A_dtype)
  1272. .set_dtype(1, B_dtype)
  1273. .set_dtype(2, C_dtype)
  1274. .set_dtype(4, D_dtype)
  1275. .set_epsilon(eps)
  1276. .set_param(arg.param)
  1277. .execs({arg.src, arg.filter, arg.bias, {}, {}});
  1278. }
  1279. }
  1280. };
  1281. run(handle(), args, {2, 6}, dtype::Float32(), dtype::Float32(),
  1282. dtype::Float32(), dtype::Float32(), 1e-3f);
  1283. }
  1284. /*********************************** End winograd ************************/
  1285. #if MEGDNN_X86_WITH_MKL_DNN
  1286. static void x86_correctness_fp32_mkldnn_run(
  1287. Checker<ConvBias>& checker, UniformIntRNG& rng, Handle* handle,
  1288. ConvBiasForward::BiasMode bias_mode,
  1289. param::ConvBias::NonlineMode noline_mode, size_t n, size_t stride,
  1290. size_t kernel, size_t oc, size_t ic, size_t h, size_t w, size_t group) {
  1291. auto oc_per_group = oc / group;
  1292. auto ic_per_group = ic / group;
  1293. bool ok_group = oc_per_group % 8 == 0 && oc_per_group > 0 &&
  1294. (ic_per_group % 8 == 0 || ic_per_group == 3) &&
  1295. ic_per_group > 0;
  1296. bool ok_depthwise = oc == ic && oc == group;
  1297. if (!(ok_group || ok_depthwise)) {
  1298. return;
  1299. }
  1300. size_t pad = kernel / 2;
  1301. size_t kernel_h = kernel;
  1302. size_t kernel_w = kernel;
  1303. param::ConvBias param;
  1304. param.format = param::ConvBias::Format::NCHW88;
  1305. param.stride_h = stride;
  1306. param.stride_w = stride;
  1307. param.pad_h = pad;
  1308. param.pad_w = pad;
  1309. param.nonlineMode = noline_mode;
  1310. auto src_tensor_shape = TensorShape{n, ic / 8, h, w, 8};
  1311. if (ic == 3) {
  1312. src_tensor_shape = TensorShape{n, ic, h, w};
  1313. }
  1314. auto weight_tensor_shape =
  1315. TensorShape{oc / 8, ic / 8, kernel_h, kernel_w, 8, 8};
  1316. if (ic == 3) {
  1317. weight_tensor_shape = TensorShape{oc / 8, kernel_h, kernel_w, ic, 8};
  1318. }
  1319. auto bias_tensor_shape = TensorShape{};
  1320. if (bias_mode == megdnn::BiasMode::BROADCAST_CHANNEL_BIAS) {
  1321. bias_tensor_shape = {1, oc / 8, 1, 1, 8};
  1322. } else if (bias_mode == megdnn::BiasMode::BIAS) {
  1323. TensorLayout dst_layout;
  1324. auto ConvBiasOp = handle->create_operator<ConvBias>();
  1325. ConvBiasOp->param() = param;
  1326. ConvBiasOp->deduce_layout({src_tensor_shape, dtype::Float32()},
  1327. {weight_tensor_shape, dtype::Float32()}, {},
  1328. {}, dst_layout);
  1329. bias_tensor_shape = dst_layout;
  1330. }
  1331. if (group == 1) {
  1332. param.sparse = param::ConvBias::Sparse::DENSE;
  1333. } else if (group > 1 && ic / group == 1 && oc / group == 1) {
  1334. param.sparse = param::ConvBias::Sparse::GROUP;
  1335. weight_tensor_shape =
  1336. TensorShape{group / 8, 1, 1, kernel_h, kernel_w, 8};
  1337. } else if (group > 1 && oc / group % 8 == 0 && oc / group > 0 &&
  1338. ic / group % 8 == 0 && ic / group > 0) {
  1339. param.sparse = param::ConvBias::Sparse::GROUP;
  1340. weight_tensor_shape = TensorShape{
  1341. group, oc / group / 8, ic / group / 8, kernel_h, kernel_w, 8,
  1342. 8};
  1343. }
  1344. checker.set_dtype(0, dtype::Float32())
  1345. .set_dtype(1, dtype::Float32())
  1346. .set_dtype(2, dtype::Float32())
  1347. .set_dtype(4, dtype::Float32())
  1348. .set_rng(0, &rng)
  1349. .set_rng(1, &rng)
  1350. .set_rng(2, &rng)
  1351. .set_epsilon(1e-3)
  1352. .set_param(param)
  1353. .execs({src_tensor_shape,
  1354. weight_tensor_shape,
  1355. bias_tensor_shape,
  1356. {},
  1357. {}});
  1358. }
  1359. static void x86_correctness_fp32_mkldnn(Handle* handle) {
  1360. Checker<ConvBias> checker(handle);
  1361. UniformIntRNG rng{-127, 127};
  1362. checker.set_before_exec_callback(
  1363. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>(
  1364. "MKLDNN_CONV_FP32"));
  1365. for (auto bias_mode :
  1366. {megdnn::BiasMode::NO_BIAS, megdnn::BiasMode::BROADCAST_CHANNEL_BIAS,
  1367. megdnn::BiasMode::BIAS})
  1368. for (auto noline_mode : {param::ConvBias::NonlineMode::IDENTITY,
  1369. param::ConvBias::NonlineMode::SIGMOID,
  1370. param::ConvBias::NonlineMode::H_SWISH})
  1371. for (size_t n : {1, 2})
  1372. for (size_t stride : {1, 2})
  1373. for (size_t kernel : {3, 5, 7})
  1374. for (size_t oc : {8, 16})
  1375. for (size_t ic : {3, 8, 16})
  1376. for (size_t h : {22, 33})
  1377. for (size_t w : {22, 33}) {
  1378. for (size_t group = 1;
  1379. group <= std::min(oc, ic);
  1380. ++group) {
  1381. x86_correctness_fp32_mkldnn_run(
  1382. checker, rng, handle,
  1383. bias_mode, noline_mode, n,
  1384. stride, kernel, oc, ic, h,
  1385. w, group);
  1386. }
  1387. }
  1388. }
  1389. TEST_F(X86, CONV_BIAS_DIRECT_MKLDNN_C8) {
  1390. x86_correctness_fp32_mkldnn(handle());
  1391. }
  1392. TEST_F(X86_MULTI_THREADS, CONV_BIAS_DIRECT_MKLDNN_C8) {
  1393. x86_correctness_fp32_mkldnn(handle());
  1394. }
  1395. TEST_F(X86, CONV_BIAS_MKL_DNN_MATMUL_INT8) {
  1396. using namespace conv_bias;
  1397. std::vector<TestArg> args;
  1398. auto run = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  1399. size_t p, NonlineMode nonline_mode) {
  1400. if (w + 2 * p < kernel || h + 2 * p < kernel)
  1401. return;
  1402. param::ConvBias param;
  1403. param.stride_h = 1;
  1404. param.stride_w = 1;
  1405. param.pad_h = p;
  1406. param.pad_w = p;
  1407. param.nonlineMode = nonline_mode;
  1408. //! no bias
  1409. args.emplace_back(param, TensorShape{1, ic, h, w},
  1410. TensorShape{oc, ic, kernel, kernel}, TensorShape{});
  1411. };
  1412. for (size_t kernel : {2, 3, 5, 7})
  1413. for (size_t ic : {1, 2, 3, 4})
  1414. for (size_t oc : {1, 2, 4})
  1415. for (size_t p : {0, 2})
  1416. for (size_t size : {20, 21, 22, 23, 24})
  1417. for (NonlineMode nonline_mode :
  1418. {NonlineMode::IDENTITY}) {
  1419. run(oc, ic, size, size, kernel, p, nonline_mode);
  1420. }
  1421. Checker<ConvBias> checker(handle());
  1422. checker.set_before_exec_callback(
  1423. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>(
  1424. "MKLDNN_MATMUL_INT8"));
  1425. checker.set_epsilon(1);
  1426. UniformIntRNG rng{-50, 50};
  1427. checker.set_dtype(0, dtype::Int8())
  1428. .set_dtype(1, dtype::Int8())
  1429. .set_dtype(2, dtype::Int32())
  1430. .set_dtype(4, dtype::Int32())
  1431. .set_rng(0, &rng)
  1432. .set_rng(1, &rng)
  1433. .set_rng(2, &rng);
  1434. for (auto&& arg : args) {
  1435. checker.set_param(arg.param).exec(
  1436. {arg.src, arg.filter, arg.bias, {}, {}});
  1437. }
  1438. }
  1439. TEST_F(X86, CONV_BIAS_MKL_DNN_INT8) {
  1440. using namespace conv_bias;
  1441. std::vector<TestArg> args;
  1442. auto run = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  1443. size_t p, NonlineMode nonline_mode) {
  1444. if (w + 2 * p < kernel || h + 2 * p < kernel)
  1445. return;
  1446. param::ConvBias param;
  1447. param.stride_h = 1;
  1448. param.stride_w = 1;
  1449. param.pad_h = p;
  1450. param.pad_w = p;
  1451. param.nonlineMode = nonline_mode;
  1452. //! no bias
  1453. args.emplace_back(param, TensorShape{1, ic, h, w},
  1454. TensorShape{oc, ic, kernel, kernel}, TensorShape{});
  1455. };
  1456. for (size_t kernel : {2, 3, 5, 7})
  1457. for (size_t ic : {1, 2, 3, 4})
  1458. for (size_t oc : {1, 2, 4})
  1459. for (size_t p : {0, 2})
  1460. for (size_t size : {20, 22, 24})
  1461. for (NonlineMode nonline_mode :
  1462. {NonlineMode::IDENTITY}) {
  1463. run(oc, ic, size, size, kernel, p, nonline_mode);
  1464. }
  1465. Checker<ConvBias> checker(handle());
  1466. checker.set_before_exec_callback(
  1467. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>("MKLDNN_INT8"));
  1468. checker.set_epsilon(1);
  1469. UniformIntRNG rng{-50, 50};
  1470. checker.set_dtype(0, dtype::Int8())
  1471. .set_dtype(1, dtype::Int8())
  1472. .set_dtype(2, dtype::Int32())
  1473. .set_dtype(4, dtype::Int32())
  1474. .set_rng(0, &rng)
  1475. .set_rng(1, &rng)
  1476. .set_rng(2, &rng);
  1477. for (auto&& arg : args) {
  1478. checker.set_param(arg.param).exec(
  1479. {arg.src, arg.filter, arg.bias, {}, {}});
  1480. }
  1481. }
  1482. TEST_F(X86_MULTI_THREADS, CONV_BIAS_MKL_DNN_INT8) {
  1483. using namespace conv_bias;
  1484. std::vector<TestArg> args;
  1485. auto run = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  1486. size_t p, NonlineMode nonline_mode) {
  1487. if (w + 2 * p < kernel || h + 2 * p < kernel)
  1488. return;
  1489. param::ConvBias param;
  1490. param.stride_h = 1;
  1491. param.stride_w = 1;
  1492. param.pad_h = p;
  1493. param.pad_w = p;
  1494. param.nonlineMode = nonline_mode;
  1495. //! no bias
  1496. args.emplace_back(param, TensorShape{1, ic, h, w},
  1497. TensorShape{oc, ic, kernel, kernel}, TensorShape{});
  1498. };
  1499. for (size_t kernel : {2, 3, 5, 7})
  1500. for (size_t ic : {1, 2, 3, 4})
  1501. for (size_t oc : {1, 2, 4})
  1502. for (size_t p : {0, 2})
  1503. for (size_t size : {20, 22, 24})
  1504. for (NonlineMode nonline_mode :
  1505. {NonlineMode::IDENTITY}) {
  1506. run(oc, ic, size, size, kernel, p, nonline_mode);
  1507. }
  1508. Checker<ConvBias> checker(handle());
  1509. checker.set_before_exec_callback(
  1510. conv_bias::ConvBiasAlgoChecker<ConvBiasForward>("MKLDNN_INT8"));
  1511. checker.set_epsilon(1);
  1512. UniformIntRNG rng{-50, 50};
  1513. checker.set_dtype(0, dtype::Int8())
  1514. .set_dtype(1, dtype::Int8())
  1515. .set_dtype(2, dtype::Int32())
  1516. .set_dtype(4, dtype::Int32())
  1517. .set_rng(0, &rng)
  1518. .set_rng(1, &rng)
  1519. .set_rng(2, &rng);
  1520. for (auto&& arg : args) {
  1521. checker.set_param(arg.param).exec(
  1522. {arg.src, arg.filter, arg.bias, {}, {}});
  1523. }
  1524. }
  1525. #endif
  1526. #if MEGDNN_WITH_BENCHMARK
  1527. namespace {
  1528. void benchmark_impl(const param::ConvBias param,
  1529. std::vector<std::pair<SmallVector<TensorShape>, float>>&
  1530. shapes_and_computation,
  1531. const std::string algo_name, size_t RUNS,
  1532. TaskExecutorConfig&& multi_thread_config,
  1533. TaskExecutorConfig&& single_thread_config,
  1534. std::vector<DType> dtype_v) {
  1535. std::vector<DType> data_type = {dtype::Float32(), dtype::Float32(),
  1536. dtype::Float32(), dtype::Float32()};
  1537. std::vector<float> multi_thread_times, single_thread_times;
  1538. {
  1539. auto multi_thread_hanle =
  1540. create_cpu_handle(0, true, &multi_thread_config);
  1541. auto benchmarker = Benchmarker<ConvBias>(multi_thread_hanle.get());
  1542. benchmarker.set_times(RUNS)
  1543. .set_display(false)
  1544. .set_dtype(0, dtype_v[0])
  1545. .set_dtype(1, dtype_v[1])
  1546. .set_dtype(2, dtype_v[2])
  1547. .set_dtype(4, dtype_v[3])
  1548. .set_param(param)
  1549. .set_before_exec_callback(
  1550. conv_bias::ConvBiasAlgoChecker<ConvBias>(
  1551. algo_name.c_str()));
  1552. for (auto shape : shapes_and_computation) {
  1553. multi_thread_times.push_back(benchmarker.exec(shape.first) / RUNS);
  1554. }
  1555. }
  1556. {
  1557. auto single_thread_handle =
  1558. create_cpu_handle(0, true, &single_thread_config);
  1559. auto benchmarker = Benchmarker<ConvBias>(single_thread_handle.get());
  1560. benchmarker.set_times(RUNS)
  1561. .set_display(false)
  1562. .set_dtype(0, dtype_v[0])
  1563. .set_dtype(1, dtype_v[1])
  1564. .set_dtype(2, dtype_v[2])
  1565. .set_dtype(4, dtype_v[3])
  1566. .set_param(param)
  1567. .set_before_exec_callback(
  1568. conv_bias::ConvBiasAlgoChecker<ConvBias>(
  1569. algo_name.c_str()));
  1570. for (auto shape : shapes_and_computation) {
  1571. single_thread_times.push_back(benchmarker.exec(shape.first) / RUNS);
  1572. }
  1573. }
  1574. printf("Benchmark : Multi threads %zu, ", multi_thread_config.nr_thread);
  1575. printf("core_ids:");
  1576. for (size_t i = 0; i < multi_thread_config.affinity_core_set.size(); i++) {
  1577. printf("%zu ", multi_thread_config.affinity_core_set[i]);
  1578. }
  1579. printf(", Single thread core_id %zu\n",
  1580. single_thread_config.affinity_core_set[0]);
  1581. for (size_t i = 0; i < shapes_and_computation.size(); i++) {
  1582. auto shapes = shapes_and_computation[i];
  1583. printf("Bench case: ");
  1584. for (auto&& shape : shapes.first) {
  1585. printf("%s ", shape.to_string().c_str());
  1586. }
  1587. float computations = shapes.second;
  1588. printf("%zu threads gflops: %f,\n single thread gflops: "
  1589. "%f. spead up = %f, speedup/cores=%f\n",
  1590. multi_thread_config.nr_thread,
  1591. computations / multi_thread_times[i],
  1592. computations / single_thread_times[i],
  1593. single_thread_times[i] / multi_thread_times[i],
  1594. single_thread_times[i] / multi_thread_times[i] /
  1595. multi_thread_config.nr_thread);
  1596. }
  1597. }
  1598. void benchmark_impl_comp(
  1599. const param::ConvBias param,
  1600. std::vector<std::pair<SmallVector<TensorShape>, float>>&
  1601. shapes_and_computation,
  1602. const std::string algo_name, const std::string algo_name1, size_t RUNS,
  1603. TaskExecutorConfig&& multi_thread_config,
  1604. TaskExecutorConfig&& single_thread_config, std::vector<DType> dtype_v) {
  1605. std::vector<DType> data_type = {dtype::Float32(), dtype::Float32(),
  1606. dtype::Float32(), dtype::Float32()};
  1607. std::vector<float> multi_thread_times, single_thread_times;
  1608. {
  1609. auto multi_thread_hanle =
  1610. create_cpu_handle(0, true, &multi_thread_config);
  1611. auto benchmarker = Benchmarker<ConvBias>(multi_thread_hanle.get());
  1612. benchmarker.set_times(RUNS)
  1613. .set_display(false)
  1614. .set_dtype(0, dtype_v[0])
  1615. .set_dtype(1, dtype_v[1])
  1616. .set_dtype(2, dtype_v[2])
  1617. .set_dtype(4, dtype_v[3])
  1618. .set_param(param)
  1619. .set_before_exec_callback(
  1620. conv_bias::ConvBiasAlgoChecker<ConvBias>(
  1621. algo_name.c_str()));
  1622. for (auto shape : shapes_and_computation) {
  1623. multi_thread_times.push_back(benchmarker.exec(shape.first) / RUNS);
  1624. }
  1625. }
  1626. {
  1627. auto single_thread_handle =
  1628. create_cpu_handle(0, true, &single_thread_config);
  1629. auto benchmarker = Benchmarker<ConvBias>(single_thread_handle.get());
  1630. benchmarker.set_times(RUNS)
  1631. .set_display(false)
  1632. .set_dtype(0, dtype_v[0])
  1633. .set_dtype(1, dtype_v[1])
  1634. .set_dtype(2, dtype_v[2])
  1635. .set_dtype(4, dtype_v[3])
  1636. .set_param(param)
  1637. .set_before_exec_callback(
  1638. conv_bias::ConvBiasAlgoChecker<ConvBias>(
  1639. algo_name1.c_str()));
  1640. for (auto shape : shapes_and_computation) {
  1641. single_thread_times.push_back(benchmarker.exec(shape.first) / RUNS);
  1642. }
  1643. }
  1644. printf("Benchmark : Multi threads %zu, ", multi_thread_config.nr_thread);
  1645. printf("core_ids:");
  1646. for (size_t i = 0; i < multi_thread_config.affinity_core_set.size(); i++) {
  1647. printf("%zu ", multi_thread_config.affinity_core_set[i]);
  1648. }
  1649. for (size_t i = 0; i < shapes_and_computation.size(); i++) {
  1650. auto shapes = shapes_and_computation[i];
  1651. printf("Bench case: ");
  1652. for (auto&& shape : shapes.first) {
  1653. printf("%s ", shape.to_string().c_str());
  1654. }
  1655. float computations = shapes.second;
  1656. printf("algo:%s gflops: %f,\n algo:%s gflops: "
  1657. "%f. spead up = %f\n",
  1658. algo_name.c_str(), computations / multi_thread_times[i],
  1659. algo_name1.c_str(), computations / single_thread_times[i],
  1660. single_thread_times[i] / multi_thread_times[i]);
  1661. }
  1662. }
  1663. } // namespace
  1664. static void benchmark_convbias_chanwise_avx2_int8(uint32_t stride,
  1665. const char* algo) {
  1666. constexpr size_t RUNS = 50;
  1667. param::ConvBias param;
  1668. param.stride_h = stride;
  1669. param.stride_w = stride;
  1670. param.sparse = param::ConvBias::Sparse::GROUP;
  1671. std::vector<DType> data_type = {dtype::Int8(), dtype::Int8(),
  1672. dtype::Int32(), dtype::Int32()};
  1673. std::vector<std::pair<SmallVector<TensorShape>, float>>
  1674. shapes_and_computation;
  1675. auto bench_case = [&](size_t N, size_t IC, size_t H, size_t W, size_t FS) {
  1676. param.pad_h = FS / 2;
  1677. param.pad_w = FS / 2;
  1678. SmallVector<TensorShape> shapes{
  1679. {N, IC, H, W}, {IC, 1, 1, FS, FS}, {}, {}, {}};
  1680. TensorShape dst{N, IC, (H + 2 * param.pad_h - FS) + 1,
  1681. (W + 2 * param.pad_w - FS) + 1};
  1682. float computations = (FS * FS * dst.total_nr_elems() * 2) * 1e-6;
  1683. shapes_and_computation.push_back(std::make_pair(shapes, computations));
  1684. };
  1685. bench_case(1, 32, 112, 112, 7);
  1686. bench_case(1, 144, 56, 56, 7);
  1687. bench_case(1, 192, 28, 28, 7);
  1688. bench_case(1, 384, 28, 28, 7);
  1689. bench_case(1, 576, 14, 14, 7);
  1690. bench_case(1, 960, 7, 7, 7);
  1691. bench_case(1, 32, 112, 112, 5);
  1692. bench_case(1, 144, 56, 56, 5);
  1693. bench_case(1, 192, 28, 28, 5);
  1694. bench_case(1, 384, 28, 28, 5);
  1695. bench_case(1, 576, 14, 14, 5);
  1696. bench_case(1, 960, 7, 7, 5);
  1697. bench_case(1, 32, 112, 112, 3);
  1698. bench_case(1, 144, 56, 56, 3);
  1699. bench_case(1, 192, 28, 28, 3);
  1700. bench_case(1, 384, 28, 28, 3);
  1701. bench_case(1, 576, 14, 14, 3);
  1702. bench_case(1, 960, 7, 7, 3);
  1703. bench_case(1, 32, 112, 112, 2);
  1704. bench_case(1, 144, 56, 56, 2);
  1705. bench_case(1, 192, 28, 28, 2);
  1706. bench_case(1, 384, 28, 28, 2);
  1707. bench_case(1, 576, 14, 14, 2);
  1708. bench_case(1, 960, 7, 7, 2);
  1709. std::string algo_name = algo;
  1710. printf("Benchmark %s\n", algo);
  1711. benchmark_impl(param, shapes_and_computation, algo_name, RUNS,
  1712. {4, {4, 5, 6, 7}}, {1, {4}}, data_type);
  1713. benchmark_impl(param, shapes_and_computation, algo_name, RUNS, {2, {4, 5}},
  1714. {1, {4}}, data_type);
  1715. shapes_and_computation.clear();
  1716. }
  1717. TEST_F(X86_BENCHMARK_MULTI_THREADS, BENCHMARK_CONVBIAS_CHANWISE_AVX2_INT8_S1) {
  1718. benchmark_convbias_chanwise_avx2_int8(
  1719. 1, "X86_CONV_BIAS_CHANWISE_AVX2_INT8_STRIDE1");
  1720. }
  1721. TEST_F(X86_BENCHMARK_MULTI_THREADS, BENCHMARK_CONVBIAS_CHANWISE_AVX2_INT8_S2) {
  1722. benchmark_convbias_chanwise_avx2_int8(
  1723. 2, "X86_CONV_BIAS_CHANWISE_AVX2_INT8_STRIDE2");
  1724. }
  1725. TEST_F(X86_BENCHMARK_MULTI_THREADS, BENCHMARK_CONVBIAS_DIRECT_AVX2_INT8) {
  1726. constexpr size_t RUNS = 50;
  1727. param::ConvBias param;
  1728. param.stride_h = 1;
  1729. param.stride_w = 1;
  1730. param.sparse = param::ConvBias::Sparse::DENSE;
  1731. std::vector<DType> data_type = {dtype::Int8(), dtype::Int8(),
  1732. dtype::Int32(), dtype::Int32()};
  1733. std::vector<std::pair<SmallVector<TensorShape>, float>>
  1734. shapes_and_computation;
  1735. auto bench_case = [&](size_t N, size_t IC, size_t OC, size_t H, size_t W,
  1736. size_t FS) {
  1737. param.pad_h = FS / 2;
  1738. param.pad_w = FS / 2;
  1739. SmallVector<TensorShape> shapes{
  1740. {N, IC, H, W}, {OC, IC, FS, FS}, {}, {}, {}};
  1741. TensorShape dst{N, OC, (H + 2 * param.pad_h - FS) + 1,
  1742. (W + 2 * param.pad_w - FS) + 1};
  1743. float computations = (IC * FS * FS * dst.total_nr_elems() * 2) * 1e-6;
  1744. shapes_and_computation.push_back(std::make_pair(shapes, computations));
  1745. };
  1746. bench_case(1, 32, 32, 200, 200, 7);
  1747. bench_case(1, 32, 64, 200, 200, 7);
  1748. bench_case(1, 32, 32, 128, 128, 7);
  1749. bench_case(1, 32, 64, 128, 128, 7);
  1750. bench_case(1, 32, 32, 100, 100, 7);
  1751. bench_case(1, 32, 64, 100, 100, 7);
  1752. bench_case(1, 32, 32, 80, 80, 7);
  1753. bench_case(1, 32, 64, 80, 80, 7);
  1754. bench_case(1, 32, 32, 200, 200, 5);
  1755. bench_case(1, 32, 64, 200, 200, 5);
  1756. bench_case(1, 32, 32, 128, 128, 5);
  1757. bench_case(1, 32, 64, 128, 128, 5);
  1758. bench_case(1, 32, 32, 100, 100, 5);
  1759. bench_case(1, 32, 64, 100, 100, 5);
  1760. bench_case(1, 32, 32, 80, 80, 5);
  1761. bench_case(1, 32, 64, 80, 80, 5);
  1762. bench_case(1, 32, 32, 200, 200, 3);
  1763. bench_case(1, 32, 64, 200, 200, 3);
  1764. bench_case(1, 32, 32, 128, 128, 3);
  1765. bench_case(1, 32, 64, 128, 128, 3);
  1766. bench_case(1, 32, 32, 100, 100, 3);
  1767. bench_case(1, 32, 64, 100, 100, 3);
  1768. bench_case(1, 32, 32, 80, 80, 3);
  1769. bench_case(1, 32, 64, 80, 80, 3);
  1770. bench_case(1, 32, 32, 200, 200, 2);
  1771. bench_case(1, 32, 64, 200, 200, 2);
  1772. bench_case(1, 32, 32, 128, 128, 2);
  1773. bench_case(1, 32, 64, 128, 128, 2);
  1774. bench_case(1, 32, 32, 100, 100, 2);
  1775. bench_case(1, 32, 64, 100, 100, 2);
  1776. bench_case(1, 32, 32, 80, 80, 2);
  1777. bench_case(1, 32, 64, 80, 80, 2);
  1778. std::string algo_name = "X86_CONV_BIAS_DIRECT_AVX2_INT8_STRIDE1";
  1779. printf("Benchmark X86_CONV_BIAS_DIRECT_AVX2_INT8_STRIDE1 algo\n");
  1780. benchmark_impl(param, shapes_and_computation, algo_name, RUNS,
  1781. {4, {4, 5, 6, 7}}, {1, {4}}, data_type);
  1782. benchmark_impl(param, shapes_and_computation, algo_name, RUNS,
  1783. {4, {4, 5, 6, 7}}, {1, {7}}, data_type);
  1784. benchmark_impl(param, shapes_and_computation, algo_name, RUNS, {2, {4, 5}},
  1785. {1, {4}}, data_type);
  1786. shapes_and_computation.clear();
  1787. }
  1788. TEST_F(X86_BENCHMARK_MULTI_THREADS, BENCHMARK_CONVBIAS_8816) {
  1789. constexpr size_t RUNS = 30;
  1790. param::ConvBias param;
  1791. param.stride_h = 1;
  1792. param.stride_w = 1;
  1793. param.sparse = param::ConvBias::Sparse::DENSE;
  1794. std::vector<DType> data_type = {dtype::Int8(), dtype::Int8(),
  1795. dtype::Int16(), dtype::Int16()};
  1796. std::vector<std::pair<SmallVector<TensorShape>, float>>
  1797. shapes_and_computation;
  1798. auto bench_case = [&](size_t N, size_t IC, size_t OC, size_t H, size_t W,
  1799. size_t FS) {
  1800. param.pad_h = FS / 2;
  1801. param.pad_w = FS / 2;
  1802. SmallVector<TensorShape> shapes{
  1803. {N, IC, H, W}, {OC, IC, FS, FS}, {}, {}, {}};
  1804. TensorShape dst{N, OC, (H + 2 * param.pad_h - FS) / param.stride_h + 1,
  1805. (W + 2 * param.pad_w - FS) / param.stride_w + 1};
  1806. float computations = (IC * FS * FS * dst.total_nr_elems() * 2) * 1e-6;
  1807. shapes_and_computation.push_back(std::make_pair(shapes, computations));
  1808. };
  1809. bench_case(1, 48, 192, 15, 15, 1);
  1810. std::string algo_name = "IM2COLMATMUL:X86_INT8X8X16_AVX2";
  1811. benchmark_impl(param, shapes_and_computation, algo_name, RUNS,
  1812. {4, {4, 5, 6, 7}}, {1, {4}}, data_type);
  1813. shapes_and_computation.clear();
  1814. }
  1815. TEST_F(X86_BENCHMARK_MULTI_THREADS,
  1816. BENCHMARK_CONVBIAS_DIRECT_AVX2_INT8_STRIDE2) {
  1817. constexpr size_t RUNS = 50;
  1818. param::ConvBias param;
  1819. param.stride_h = 2;
  1820. param.stride_w = 2;
  1821. param.sparse = param::ConvBias::Sparse::DENSE;
  1822. std::vector<DType> data_type = {dtype::Int8(), dtype::Int8(),
  1823. dtype::Int32(), dtype::Int32()};
  1824. std::vector<std::pair<SmallVector<TensorShape>, float>>
  1825. shapes_and_computation;
  1826. auto bench_case = [&](size_t N, size_t IC, size_t OC, size_t H, size_t W,
  1827. size_t FS) {
  1828. param.pad_h = FS / 2;
  1829. param.pad_w = FS / 2;
  1830. SmallVector<TensorShape> shapes{
  1831. {N, IC, H, W}, {OC, IC, FS, FS}, {}, {}, {}};
  1832. TensorShape dst{N, OC, (H + 2 * param.pad_h - FS) / param.stride_h + 1,
  1833. (W + 2 * param.pad_w - FS) / param.stride_w + 1};
  1834. float computations = (IC * FS * FS * dst.total_nr_elems() * 2) * 1e-6;
  1835. shapes_and_computation.push_back(std::make_pair(shapes, computations));
  1836. };
  1837. bench_case(1, 32, 32, 200, 200, 7);
  1838. bench_case(1, 32, 64, 200, 200, 7);
  1839. bench_case(1, 32, 32, 128, 128, 7);
  1840. bench_case(1, 32, 64, 128, 128, 7);
  1841. bench_case(1, 32, 32, 100, 100, 7);
  1842. bench_case(1, 32, 64, 100, 100, 7);
  1843. bench_case(1, 32, 32, 80, 80, 7);
  1844. bench_case(1, 32, 64, 80, 80, 7);
  1845. bench_case(1, 32, 32, 200, 200, 5);
  1846. bench_case(1, 32, 64, 200, 200, 5);
  1847. bench_case(1, 32, 32, 128, 128, 5);
  1848. bench_case(1, 32, 64, 128, 128, 5);
  1849. bench_case(1, 32, 32, 100, 100, 5);
  1850. bench_case(1, 32, 64, 100, 100, 5);
  1851. bench_case(1, 32, 32, 80, 80, 5);
  1852. bench_case(1, 32, 64, 80, 80, 5);
  1853. bench_case(1, 32, 32, 200, 200, 3);
  1854. bench_case(1, 32, 64, 200, 200, 3);
  1855. bench_case(1, 32, 32, 128, 128, 3);
  1856. bench_case(1, 32, 64, 128, 128, 3);
  1857. bench_case(1, 32, 32, 100, 100, 3);
  1858. bench_case(1, 32, 64, 100, 100, 3);
  1859. bench_case(1, 32, 32, 80, 80, 3);
  1860. bench_case(1, 32, 64, 80, 80, 3);
  1861. bench_case(1, 32, 32, 200, 200, 2);
  1862. bench_case(1, 32, 64, 200, 200, 2);
  1863. bench_case(1, 32, 32, 128, 128, 2);
  1864. bench_case(1, 32, 64, 128, 128, 2);
  1865. bench_case(1, 32, 32, 100, 100, 2);
  1866. bench_case(1, 32, 64, 100, 100, 2);
  1867. bench_case(1, 32, 32, 80, 80, 2);
  1868. bench_case(1, 32, 64, 80, 80, 2);
  1869. std::string algo_name = "X86_CONV_BIAS_DIRECT_AVX2_INT8_STRIDE2";
  1870. printf("Benchmark X86_CONV_BIAS_DIRECT_AVX2_INT8_STRIDE2 algo\n");
  1871. benchmark_impl(param, shapes_and_computation, algo_name, RUNS,
  1872. {4, {4, 5, 6, 7}}, {1, {4}}, data_type);
  1873. benchmark_impl(param, shapes_and_computation, algo_name, RUNS,
  1874. {4, {4, 5, 6, 7}}, {1, {7}}, data_type);
  1875. benchmark_impl(param, shapes_and_computation, algo_name, RUNS, {2, {4, 5}},
  1876. {1, {4}}, data_type);
  1877. shapes_and_computation.clear();
  1878. }
  1879. TEST_F(X86_BENCHMARK_MULTI_THREADS, BENCHMARK_CONVBIAS_DIRECTF32) {
  1880. constexpr size_t RUNS = 50;
  1881. param::ConvBias param;
  1882. param.nonlineMode = param::ConvBias::NonlineMode::RELU;
  1883. param.pad_h = 1;
  1884. param.pad_w = 1;
  1885. param.stride_h = 1;
  1886. param.stride_w = 1;
  1887. param.sparse = param::ConvBias::Sparse::GROUP;
  1888. std::vector<DType> data_type = {dtype::Float32(), dtype::Float32(),
  1889. dtype::Float32(), dtype::Float32()};
  1890. std::vector<std::pair<SmallVector<TensorShape>, float>>
  1891. shapes_and_computation;
  1892. auto bench_case = [&](size_t N, size_t IC, size_t OC, size_t H, size_t W,
  1893. size_t FS, size_t group) {
  1894. SmallVector<TensorShape> shapes{{N, IC, H, W},
  1895. {group, OC / group, IC / group, FS, FS},
  1896. {1, OC, 1, 1},
  1897. {},
  1898. {N, OC, H, W}};
  1899. TensorShape dst{N, OC, H, W};
  1900. float computations =
  1901. ((IC / group) * FS * FS * dst.total_nr_elems() * 2 +
  1902. dst.total_nr_elems()) *
  1903. 1e-6;
  1904. shapes_and_computation.push_back(std::make_pair(shapes, computations));
  1905. };
  1906. bench_case(1, 32, 32, 200, 200, 3, 4);
  1907. bench_case(1, 32, 32, 200, 200, 3, 32);
  1908. bench_case(1, 32, 32, 128, 128, 3, 4);
  1909. bench_case(1, 32, 32, 128, 128, 3, 32);
  1910. bench_case(1, 32, 32, 100, 100, 3, 4);
  1911. bench_case(1, 32, 32, 100, 100, 3, 32);
  1912. bench_case(1, 32, 32, 80, 80, 3, 4);
  1913. bench_case(1, 32, 32, 80, 80, 3, 32);
  1914. std::string algo_name = "X86_CONV_BIAS_DIRECT_STRIDE1_LARGE_GROUP";
  1915. printf("Benchmark X86_CONV_BIAS_DIRECT_STRIDE1_LARGE_GROUP algo\n");
  1916. benchmark_impl(param, shapes_and_computation, algo_name, RUNS,
  1917. {4, {4, 5, 6, 7}}, {1, {4}}, data_type);
  1918. benchmark_impl(param, shapes_and_computation, algo_name, RUNS,
  1919. {4, {4, 5, 6, 7}}, {1, {7}}, data_type);
  1920. benchmark_impl(param, shapes_and_computation, algo_name, RUNS, {2, {4, 5}},
  1921. {1, {4}}, data_type);
  1922. shapes_and_computation.clear();
  1923. algo_name = "X86_CONV_BIAS_DIRECT_STRIDE1_SMALL_GROUP";
  1924. printf("Benchmark X86_CONV_BIAS_DIRECT_STRIDE1_SMALL_GROUP algo\n");
  1925. bench_case(1, 32, 32, 200, 200, 3, 1);
  1926. bench_case(1, 32, 32, 128, 128, 3, 1);
  1927. bench_case(1, 32, 32, 100, 100, 3, 1);
  1928. bench_case(1, 32, 32, 80, 80, 3, 1);
  1929. benchmark_impl(param, shapes_and_computation, algo_name, RUNS,
  1930. {4, {4, 5, 6, 7}}, {1, {4}}, data_type);
  1931. benchmark_impl(param, shapes_and_computation, algo_name, RUNS,
  1932. {4, {4, 5, 6, 7}}, {1, {7}}, data_type);
  1933. benchmark_impl(param, shapes_and_computation, algo_name, RUNS, {2, {4, 5}},
  1934. {1, {4}}, data_type);
  1935. }
  1936. TEST_F(X86_BENCHMARK_MULTI_THREADS, BENCHMARK_CONVBIAS_IM2COL_F32) {
  1937. constexpr size_t RUNS = 50;
  1938. param::ConvBias param;
  1939. param.nonlineMode = param::ConvBias::NonlineMode::RELU;
  1940. param.pad_h = 1;
  1941. param.pad_w = 1;
  1942. param.stride_h = 1;
  1943. param.stride_w = 1;
  1944. std::vector<DType> data_type = {dtype::Float32(), dtype::Float32(),
  1945. dtype::Float32(), dtype::Float32()};
  1946. std::vector<std::pair<SmallVector<TensorShape>, float>>
  1947. shapes_and_computation;
  1948. auto bench_case = [&](size_t N, size_t IC, size_t OC, size_t H, size_t W,
  1949. size_t FS, size_t group) {
  1950. SmallVector<TensorShape> shapes{{N, IC, H, W},
  1951. {OC / group, IC / group, FS, FS},
  1952. {1, OC, 1, 1},
  1953. {},
  1954. {N, OC, H, W}};
  1955. TensorShape dst{N, OC, H, W};
  1956. float computations =
  1957. ((IC / group) * FS * FS * dst.total_nr_elems() * 2 +
  1958. dst.total_nr_elems()) *
  1959. 1e-6;
  1960. shapes_and_computation.push_back(std::make_pair(shapes, computations));
  1961. };
  1962. bench_case(1, 32, 32, 200, 200, 3, 1);
  1963. bench_case(1, 32, 32, 200, 200, 3, 1);
  1964. bench_case(1, 32, 32, 128, 128, 3, 1);
  1965. bench_case(1, 32, 32, 128, 128, 3, 1);
  1966. bench_case(1, 32, 32, 100, 100, 3, 1);
  1967. bench_case(1, 32, 32, 100, 100, 3, 1);
  1968. bench_case(1, 32, 32, 80, 80, 3, 1);
  1969. bench_case(1, 32, 32, 80, 80, 3, 1);
  1970. bench_case(1, 64, 32, 7, 7, 3, 1);
  1971. bench_case(1, 64, 64, 7, 7, 3, 1);
  1972. bench_case(1, 64, 128, 7, 7, 3, 1);
  1973. bench_case(1, 64, 256, 7, 7, 3, 1);
  1974. bench_case(1, 64, 512, 7, 7, 3, 1);
  1975. bench_case(1, 64, 1024, 7, 7, 3, 1);
  1976. bench_case(1, 64, 32, 14, 14, 3, 1);
  1977. bench_case(1, 64, 64, 14, 14, 3, 1);
  1978. bench_case(1, 64, 128, 14, 14, 3, 1);
  1979. bench_case(1, 64, 256, 14, 14, 3, 1);
  1980. bench_case(1, 64, 512, 14, 14, 3, 1);
  1981. bench_case(1, 64, 1024, 14, 14, 3, 1);
  1982. bench_case(1, 128, 128, 14, 14, 3, 1);
  1983. bench_case(1, 128, 256, 14, 14, 3, 1);
  1984. bench_case(1, 512, 512, 14, 14, 3, 1);
  1985. bench_case(1, 256, 512, 14, 14, 3, 1);
  1986. bench_case(1, 512, 1024, 14, 14, 3, 1);
  1987. bench_case(1, 1024, 1024, 14, 14, 3, 1);
  1988. std::string algo_name = "IM2COLMATMUL:X86_F32_BLAS:192";
  1989. printf("Benchmark IM2COLMATMUL:X86_F32_BLAS algo\n");
  1990. benchmark_impl(param, shapes_and_computation, algo_name, RUNS,
  1991. {4, {4, 5, 6, 7}}, {1, {4}}, data_type);
  1992. benchmark_impl(param, shapes_and_computation, algo_name, RUNS,
  1993. {4, {4, 5, 6, 7}}, {1, {7}}, data_type);
  1994. benchmark_impl(param, shapes_and_computation, algo_name, RUNS, {2, {4, 5}},
  1995. {1, {4}}, data_type);
  1996. shapes_and_computation.clear();
  1997. }
  1998. TEST_F(X86_BENCHMARK_MULTI_THREADS,
  1999. BENCHMARK_CONVBIAS_IM2COL_F32_single_thread) {
  2000. constexpr size_t RUNS = 50;
  2001. param::ConvBias param;
  2002. param.nonlineMode = param::ConvBias::NonlineMode::RELU;
  2003. param.pad_h = 1;
  2004. param.pad_w = 1;
  2005. param.stride_h = 1;
  2006. param.stride_w = 1;
  2007. std::vector<DType> data_type = {dtype::Float32(), dtype::Float32(),
  2008. dtype::Float32(), dtype::Float32()};
  2009. std::vector<std::pair<SmallVector<TensorShape>, float>>
  2010. shapes_and_computation;
  2011. auto bench_case = [&](size_t N, size_t IC, size_t OC, size_t H, size_t W,
  2012. size_t FS, size_t group) {
  2013. SmallVector<TensorShape> shapes{{N, IC, H, W},
  2014. {OC / group, IC / group, FS, FS},
  2015. {1, OC, 1, 1},
  2016. {},
  2017. {N, OC, H, W}};
  2018. TensorShape dst{N, OC, H, W};
  2019. float computations =
  2020. ((IC / group) * FS * FS * dst.total_nr_elems() * 2 +
  2021. dst.total_nr_elems()) *
  2022. 1e-6;
  2023. shapes_and_computation.push_back(std::make_pair(shapes, computations));
  2024. };
  2025. bench_case(1, 32, 32, 200, 200, 3, 1);
  2026. bench_case(1, 32, 32, 200, 200, 3, 1);
  2027. bench_case(1, 32, 32, 128, 128, 3, 1);
  2028. bench_case(1, 32, 32, 128, 128, 3, 1);
  2029. bench_case(1, 32, 32, 100, 100, 3, 1);
  2030. bench_case(1, 32, 32, 100, 100, 3, 1);
  2031. bench_case(1, 32, 32, 80, 80, 3, 1);
  2032. bench_case(1, 32, 32, 80, 80, 3, 1);
  2033. bench_case(1, 64, 32, 7, 7, 3, 1);
  2034. bench_case(1, 64, 64, 7, 7, 3, 1);
  2035. bench_case(1, 64, 128, 7, 7, 3, 1);
  2036. bench_case(1, 64, 256, 7, 7, 3, 1);
  2037. bench_case(1, 64, 512, 7, 7, 3, 1);
  2038. bench_case(1, 64, 1024, 7, 7, 3, 1);
  2039. bench_case(1, 64, 32, 14, 14, 3, 1);
  2040. bench_case(1, 64, 64, 14, 14, 3, 1);
  2041. bench_case(1, 64, 128, 14, 14, 3, 1);
  2042. bench_case(1, 64, 256, 14, 14, 3, 1);
  2043. bench_case(1, 64, 512, 14, 14, 3, 1);
  2044. bench_case(1, 64, 1024, 14, 14, 3, 1);
  2045. bench_case(1, 128, 128, 14, 14, 3, 1);
  2046. bench_case(1, 128, 256, 14, 14, 3, 1);
  2047. bench_case(1, 512, 512, 14, 14, 3, 1);
  2048. bench_case(1, 256, 512, 14, 14, 3, 1);
  2049. bench_case(1, 512, 1024, 14, 14, 3, 1);
  2050. bench_case(1, 1024, 1024, 14, 14, 3, 1);
  2051. std::string algo_name = "IM2COLMATMUL:X86_F32_MKL_PACKA:192";
  2052. std::string algo_name1 = "IM2COLMATMUL:X86_F32_BLAS:192";
  2053. printf("Benchmark IM2COLMATMUL:X86_F32_BLAS algo\n");
  2054. benchmark_impl_comp(param, shapes_and_computation, algo_name, algo_name1,
  2055. RUNS, {1, {4}}, {1, {4}}, data_type);
  2056. benchmark_impl_comp(param, shapes_and_computation, algo_name, algo_name1,
  2057. RUNS, {1, {7}}, {1, {7}}, data_type);
  2058. shapes_and_computation.clear();
  2059. }
  2060. TEST_F(X86_BENCHMARK_MULTI_THREADS, BENCHMARK_CONVBIAS_IM2COL_INT8X8X32) {
  2061. constexpr size_t RUNS = 50;
  2062. param::ConvBias param;
  2063. param.pad_h = 1;
  2064. param.pad_w = 1;
  2065. param.stride_h = 1;
  2066. param.stride_w = 1;
  2067. std::vector<std::pair<SmallVector<TensorShape>, float>>
  2068. shapes_and_computation;
  2069. auto bench_case = [&](size_t N, size_t IC, size_t OC, size_t H, size_t W,
  2070. size_t FS, size_t group) {
  2071. SmallVector<TensorShape> shapes{{N, IC, H, W},
  2072. {OC / group, IC / group, FS, FS},
  2073. {1, OC, 1, 1},
  2074. {},
  2075. {N, OC, H, W}};
  2076. TensorShape dst{N, OC, H, W};
  2077. float computations =
  2078. ((IC / group) * FS * FS * dst.total_nr_elems() * 2 +
  2079. dst.total_nr_elems()) *
  2080. 1e-6;
  2081. shapes_and_computation.push_back(std::make_pair(shapes, computations));
  2082. };
  2083. bench_case(1, 32, 32, 200, 200, 3, 1);
  2084. bench_case(1, 32, 32, 200, 200, 3, 1);
  2085. bench_case(1, 32, 32, 128, 128, 3, 1);
  2086. bench_case(1, 32, 32, 128, 128, 3, 1);
  2087. bench_case(1, 32, 32, 100, 100, 3, 1);
  2088. bench_case(1, 32, 32, 100, 100, 3, 1);
  2089. bench_case(1, 32, 32, 80, 80, 3, 1);
  2090. bench_case(1, 32, 32, 80, 80, 3, 1);
  2091. bench_case(1, 64, 32, 7, 7, 3, 1);
  2092. bench_case(1, 64, 64, 7, 7, 3, 1);
  2093. bench_case(1, 64, 128, 7, 7, 3, 1);
  2094. bench_case(1, 64, 256, 7, 7, 3, 1);
  2095. bench_case(1, 64, 512, 7, 7, 3, 1);
  2096. bench_case(1, 64, 1024, 7, 7, 3, 1);
  2097. bench_case(1, 64, 32, 14, 14, 3, 1);
  2098. bench_case(1, 64, 64, 14, 14, 3, 1);
  2099. bench_case(1, 64, 128, 14, 14, 3, 1);
  2100. bench_case(1, 64, 256, 14, 14, 3, 1);
  2101. bench_case(1, 64, 512, 14, 14, 3, 1);
  2102. bench_case(1, 64, 1024, 14, 14, 3, 1);
  2103. bench_case(1, 128, 128, 14, 14, 3, 1);
  2104. bench_case(1, 128, 256, 14, 14, 3, 1);
  2105. bench_case(1, 512, 512, 14, 14, 3, 1);
  2106. bench_case(1, 256, 512, 14, 14, 3, 1);
  2107. bench_case(1, 512, 1024, 14, 14, 3, 1);
  2108. bench_case(1, 1024, 1024, 14, 14, 3, 1);
  2109. std::vector<DType> data_type = {dtype::Int8(), dtype::Int8(),
  2110. dtype::Int32(), dtype::Int32()};
  2111. std::string algo_name = "IM2COLMATMUL:X86_INT8X8X32_AVX2_4X16X2:192";
  2112. // std::string algo_name = "IM2COLMATMUL:X86_INT8X8X32_AVX2_2X4X16";
  2113. // printf("Benchmark IM2COLMATMUL:X86_INT8X8X32_AVX2_4X16X2 algo\n");
  2114. benchmark_impl(param, shapes_and_computation, algo_name, RUNS,
  2115. {4, {4, 5, 6, 7}}, {1, {4}}, data_type);
  2116. benchmark_impl(param, shapes_and_computation, algo_name, RUNS,
  2117. {4, {4, 5, 6, 7}}, {1, {7}}, data_type);
  2118. benchmark_impl(param, shapes_and_computation, algo_name, RUNS, {2, {4, 5}},
  2119. {1, {4}}, data_type);
  2120. shapes_and_computation.clear();
  2121. }
  2122. namespace {
  2123. std::vector<conv_bias::TestArg> get_winograd_benchmark_args(size_t kernel,
  2124. size_t pack_size) {
  2125. std::vector<conv_bias::TestArg> args;
  2126. auto pack = [&](size_t oc, size_t ic, size_t w, size_t h, size_t kernel,
  2127. size_t p) {
  2128. if (ic % pack_size != 0 || oc % pack_size != 0)
  2129. return;
  2130. if (w + 2 * p < kernel || h + 2 * p < kernel)
  2131. return;
  2132. param::ConvBias param;
  2133. param.mode = param::ConvBias::Mode::CROSS_CORRELATION;
  2134. param.format = param::ConvBias::Format::NCHW88;
  2135. param.sparse = param::ConvBias::Sparse::DENSE;
  2136. param.nonlineMode = param::ConvBias::NonlineMode::RELU;
  2137. param.stride_h = 1;
  2138. param.stride_w = 1;
  2139. param.pad_h = p;
  2140. param.pad_w = p;
  2141. args.push_back(conv_bias::TestArg{
  2142. param,
  2143. TensorShape{1, ic / 8, h, w, 8},
  2144. TensorShape{oc / 8, ic / 8, kernel, kernel, 8, 8},
  2145. {1, oc / 8, 1, 1, 8}});
  2146. };
  2147. for (size_t ic : {64, 128, 256}) {
  2148. for (size_t oc : {64, 128, 256}) {
  2149. pack(oc, ic, 56, 56, kernel, kernel / 2);
  2150. pack(oc, ic, 14, 14, kernel, kernel / 2);
  2151. pack(oc, ic, 28, 28, kernel, kernel / 2);
  2152. }
  2153. }
  2154. //! conv in vgg16
  2155. pack(512, 512, 15, 15, kernel, kernel / 2);
  2156. pack(512, 256, 15, 15, kernel, kernel / 2);
  2157. pack(256, 256, 29, 29, kernel, kernel / 2);
  2158. pack(256, 128, 29, 29, kernel, kernel / 2);
  2159. pack(128, 128, 57, 57, kernel, kernel / 2);
  2160. pack(128, 64, 57, 57, kernel, kernel / 2);
  2161. pack(64, 64, 56, 56, kernel, kernel / 2);
  2162. pack(128, 128, 28, 28, kernel, kernel / 2);
  2163. pack(512, 512, 14, 14, kernel, kernel / 2);
  2164. return args;
  2165. }
  2166. void benchmark_winograd(const char* algo_name, Handle* handle, size_t kernel,
  2167. size_t pack_size) {
  2168. auto&& args = get_winograd_benchmark_args(kernel, pack_size);
  2169. using namespace conv_bias;
  2170. constexpr size_t RUN = 10;
  2171. Benchmarker<ConvBias> benchmark(handle);
  2172. benchmark.set_display(false);
  2173. benchmark.set_times(RUN);
  2174. Benchmarker<ConvBias> benchmark_winograd(handle);
  2175. benchmark_winograd.set_display(false);
  2176. benchmark_winograd.set_times(RUN);
  2177. for (auto&& arg : args) {
  2178. TensorLayout dst_layout;
  2179. auto opr = handle->create_operator<ConvBias>();
  2180. opr->param() = arg.param;
  2181. opr->deduce_layout({arg.src, dtype::Float32()},
  2182. {arg.filter, dtype::Float32()},
  2183. {arg.bias, dtype::Float32()}, {}, dst_layout);
  2184. //! dst.nr_elems * IC * FH * FW * 2
  2185. float computations = dst_layout.total_nr_elems() * arg.filter[1] *
  2186. arg.filter[2] * arg.filter[3] * 2.0 * 8.0 /
  2187. (1024 * 1024 * 1024) * 1e3;
  2188. auto used = benchmark.set_param(arg.param).exec(
  2189. {arg.src, arg.filter, {}, {}, {}}) /
  2190. RUN;
  2191. benchmark_winograd.set_param(arg.param);
  2192. auto used_winograd =
  2193. algo_benchmark<ConvBias>(benchmark_winograd,
  2194. {arg.src, arg.filter, {}, {}, {}},
  2195. algo_name) /
  2196. RUN;
  2197. printf("%s %s: normal: %f ms %f Gflops winograd: %f ms %f GFlops "
  2198. "speedup: "
  2199. "%f\n",
  2200. arg.src.to_string().c_str(), arg.filter.to_string().c_str(),
  2201. used, computations / used, used_winograd,
  2202. computations / used_winograd, used / used_winograd);
  2203. }
  2204. }
  2205. } // namespace
  2206. TEST_F(X86, BENCHMARK_CONVBIAS_WINOGRAD_F63_8x8) {
  2207. benchmark_winograd("WINOGRAD:X86_F32MK8_8X8:8:6:8", handle(), 3, 8);
  2208. }
  2209. TEST_F(X86, BENCHMARK_CONVBIAS_WINOGRAD_F23_8x8) {
  2210. benchmark_winograd("WINOGRAD:X86_F32MK8_8X8:8:2:8", handle(), 3, 8);
  2211. }
  2212. #endif
  2213. } // namespace test
  2214. } // namespace megdnn
  2215. // vim: syntax=cpp.doxygen

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