You can not select more than 25 topics Topics must start with a chinese character,a letter or number, can include dashes ('-') and can be up to 35 characters long.

tensor.cpp 27 kB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747
  1. /**
  2. * \file src/core/impl/tensor.cpp
  3. * MegEngine is Licensed under the Apache License, Version 2.0 (the "License")
  4. *
  5. * Copyright (c) 2014-2021 Megvii Inc. All rights reserved.
  6. *
  7. * Unless required by applicable law or agreed to in writing,
  8. * software distributed under the License is distributed on an
  9. * "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  10. */
  11. #include "megbrain/tensor.h"
  12. #include "megbrain/comp_node_env.h"
  13. #include "megbrain/opr/internal/megdnn_opr_wrapper.h"
  14. #include "megbrain/opr/param_defs.h"
  15. #include "megdnn/oprs.h"
  16. #include <thread>
  17. #include <cmath>
  18. #include <cstring>
  19. using namespace mgb;
  20. namespace {
  21. //! implement non-contiguous d2d copy
  22. void noncont_tensor_copy(
  23. const DeviceTensorND& dest, const DeviceTensorND& src, bool contig_dest,
  24. bool contig_src) {
  25. auto src_cn = src.comp_node();
  26. auto dst_cn = dest.comp_node();
  27. if (src_cn.device_type() == dst_cn.device_type()) {
  28. // perform relayout op for better performance when src and dst are
  29. // placed on comp nodes with the same device type
  30. auto&& src_env = CompNodeEnv::from_comp_node(src.comp_node());
  31. auto relayout = opr::intl::get_megdnn_global_opr<megdnn::Relayout>(dst_cn);
  32. dst_cn.activate();
  33. relayout->exec(
  34. const_cast<DeviceTensorND&>(src).as_megdnn(), dest.as_megdnn(),
  35. MegDNNHandle::get(src_env).handle());
  36. } else {
  37. if (contig_src) {
  38. mgb_assert(!contig_dest);
  39. DeviceTensorND tmp{dst_cn};
  40. tmp.copy_from(src);
  41. dest.copy_from_fixlayout(tmp);
  42. return;
  43. }
  44. DeviceTensorND tmp;
  45. tmp.copy_from(src);
  46. dest.copy_from_fixlayout(tmp);
  47. }
  48. }
  49. //! implement non-contiguous h2h copy
  50. void noncont_tensor_copy(
  51. const HostTensorND& dest, const HostTensorND& src, bool, bool) {
  52. auto opr =
  53. opr::intl::get_megdnn_global_opr<megdnn::Relayout>(CompNode::default_cpu());
  54. opr->exec(const_cast<HostTensorND&>(src).as_megdnn(), dest.as_megdnn());
  55. }
  56. //! implement non-contiguous d2h copy
  57. void noncont_tensor_copy(
  58. const HostTensorND& dest, const DeviceTensorND& src, bool contig_dest,
  59. bool contig_src) {
  60. if (contig_src) {
  61. mgb_assert(!contig_dest);
  62. HostTensorND tmp;
  63. tmp.copy_from(src).sync();
  64. dest.copy_from_fixlayout(tmp); // sync not needed for h2h copy
  65. return;
  66. }
  67. DeviceTensorND tmp;
  68. tmp.copy_from(src);
  69. dest.copy_from_fixlayout(tmp);
  70. }
  71. //! implement non-contiguous h2d copy
  72. void noncont_tensor_copy(
  73. const DeviceTensorND& dest, const HostTensorND& src, bool contig_dest,
  74. bool contig_src) {
  75. if (contig_src) {
  76. mgb_assert(!contig_dest);
  77. DeviceTensorND tmp;
  78. // no need to sync because device free is async-safe with respect to
  79. // host thread
  80. tmp.copy_from(src);
  81. dest.copy_from_fixlayout(tmp);
  82. return;
  83. }
  84. HostTensorND tmp;
  85. tmp.copy_from(src);
  86. dest.copy_from_fixlayout(tmp).sync();
  87. }
  88. } // anonymous namespace
  89. /* ============= Slice and SubTensorSpec ============= */
  90. SubTensorSpec SubTensorSpec::make_from_offset_elem(
  91. const TensorLayout& layout, ptrdiff_t offset_elem) {
  92. mgb_assert(layout.ndim && layout.dtype.valid());
  93. return {layout, offset_elem};
  94. }
  95. SubTensorSpec Slice::apply(TensorLayout layout, int axis) const {
  96. mgb_assert(layout.ndim > 0 && layout.dtype.valid());
  97. if (axis == megdnn::param::OptionalAxisV1::INVALID_AXIS) {
  98. axis = 0;
  99. layout = layout.collapse_contiguous();
  100. mgb_assert(
  101. layout.ndim == 1,
  102. "apply Slice with axis==INVALID_AXIS on non-contig layout");
  103. }
  104. // axis in [-ndim, ndim) is available
  105. if (axis < 0)
  106. axis += layout.ndim;
  107. mgb_assert(
  108. axis >= 0 && static_cast<size_t>(axis) < layout.ndim,
  109. "invalid axis: %d; ndim=%zu", axis, layout.ndim);
  110. ptrdiff_t size_ax = layout.shape[axis];
  111. ptrdiff_t begin, end, step = m_step.val_with_default(1);
  112. mgb_assert(step, "Slice step can not be zero");
  113. auto tostr = [](const Maybe<ptrdiff_t>& v) -> std::string {
  114. if (!v.valid())
  115. return "None";
  116. return std::to_string(v.val());
  117. };
  118. auto mod_size = [size_ax](ptrdiff_t v) -> ptrdiff_t {
  119. if (size_ax == 0)
  120. return 0;
  121. return v < 0 ? v + size_ax : v;
  122. };
  123. MGB_MARK_USED_VAR(tostr);
  124. #define CHECK(cond) \
  125. if (m_is_scalar_idx) { \
  126. mgb_assert( \
  127. cond, "index out of bound: layout=%s; request index=%s, axis=%d", \
  128. layout.to_string().c_str(), tostr(m_begin).c_str(), axis); \
  129. } else { \
  130. mgb_assert( \
  131. cond, \
  132. "index out of bound: layout=%s; request begin=%s end=%s step=%s " \
  133. "axis=%d", \
  134. layout.to_string().c_str(), tostr(m_begin).c_str(), \
  135. tostr(m_end).c_str(), tostr(m_step).c_str(), axis); \
  136. }
  137. if (step > 0) {
  138. begin = mod_size(m_begin.val_with_default(0));
  139. end = mod_size(m_end.val_with_default(size_ax));
  140. if (!m_is_scalar_idx) {
  141. end = std::min(end, size_ax);
  142. begin = std::min(begin, end);
  143. }
  144. CHECK(begin >= 0 && end >= begin && end <= size_ax)
  145. } else {
  146. begin = mod_size(m_begin.val_with_default(size_ax - 1));
  147. end = m_end.valid() ? mod_size(m_end.val()) : -1;
  148. if (!m_is_scalar_idx) {
  149. begin = std::min(begin, std::max<ptrdiff_t>(size_ax - 1, 0));
  150. end = std::min(end, begin);
  151. }
  152. CHECK(step < 0 && begin >= 0 && end <= begin && begin < size_ax && end >= -1)
  153. }
  154. auto step_abs = std::abs(step);
  155. layout.shape[axis] = (std::abs(end - begin) + step_abs - 1) / step_abs;
  156. auto orig_stride = layout.stride[axis];
  157. layout.stride[axis] *= step;
  158. // make stride as contiguous as possible
  159. if (layout.shape[axis] != 1 && axis)
  160. --axis;
  161. if (layout.shape[axis] == 1) {
  162. auto stride = layout.stride[axis] =
  163. axis + 1 < static_cast<int>(layout.ndim)
  164. ? layout.stride[axis + 1] * layout.shape[axis + 1]
  165. : 1;
  166. for (int i = axis - 1; i >= 0; --i) {
  167. if (layout.shape[i] == 1) {
  168. layout.stride[i] = stride;
  169. } else {
  170. break;
  171. }
  172. }
  173. }
  174. auto offset_elem = layout.is_empty() ? 0 : orig_stride * begin;
  175. return SubTensorSpec::make_from_offset_elem(layout, offset_elem);
  176. #undef CHECK
  177. }
  178. void SubTensorSpec::merge_with(const SubTensorSpec& rhs) {
  179. mgb_assert(
  180. m_layout.dtype.valid() && m_layout.dtype == rhs.m_layout.dtype &&
  181. rhs.m_layout.ndim);
  182. m_offset_elem += rhs.m_offset_elem;
  183. m_layout = rhs.m_layout;
  184. }
  185. /* ===================== TensorStorage ===================== */
  186. class mgb::HostTensorStorageTrait {
  187. public:
  188. static void* alloc(CompNode node, size_t size) { return node.alloc_host(size); }
  189. static void free(CompNode node, void* data) { node.free_host(data); }
  190. };
  191. class mgb::DeviceTensorStorageTrait {
  192. public:
  193. static void* alloc(CompNode node, size_t size) { return node.alloc_device(size); }
  194. static void free(CompNode node, void* data) { node.free_device(data); }
  195. };
  196. template <class Trait>
  197. TensorStorage<Trait>& TensorStorage<Trait>::operator=(const TensorStorage& rhs) {
  198. if (rhs.m_size > rhs.m_capacity) {
  199. rhs.ptr();
  200. }
  201. m_allow_realloc = rhs.m_allow_realloc;
  202. m_comp_node = rhs.m_comp_node;
  203. m_size = rhs.m_size;
  204. m_capacity = rhs.m_capacity;
  205. m_offset = rhs.m_offset;
  206. m_data = rhs.m_data;
  207. return *this;
  208. }
  209. template <class Trait>
  210. TensorStorage<Trait>& TensorStorage<Trait>::ensure_size(size_t sz) {
  211. if (sz > m_size) {
  212. mgb_throw_if(
  213. !m_allow_realloc || m_offset, MegBrainError,
  214. "can not grow a tensor that does not allow realloc");
  215. check_comp_node_valid();
  216. }
  217. m_size = sz;
  218. return *this;
  219. }
  220. template <class Trait>
  221. TensorStorage<Trait> TensorStorage<Trait>::sub(ptrdiff_t offset) const {
  222. ptr(); // apply lazy resize
  223. ptrdiff_t toff = offset + m_offset;
  224. if (offset == static_cast<ptrdiff_t>(m_size)) {
  225. return {false, m_comp_node, 0, 0, 0, RawStorage{}};
  226. }
  227. mgb_assert(
  228. toff >= 0 && offset < static_cast<ptrdiff_t>(m_size),
  229. "bad subtensor: offset=%td m_offset=%zu m_size=%zu", offset, m_offset,
  230. m_size);
  231. return {false,
  232. m_comp_node,
  233. m_size - offset,
  234. m_capacity - offset,
  235. static_cast<size_t>(toff),
  236. m_data};
  237. }
  238. template <class Trait>
  239. dt_byte* TensorStorage<Trait>::apply_lazy_and_get_ptr() {
  240. check_comp_node_valid();
  241. if (m_size > m_capacity) {
  242. mgb_assert(m_allow_realloc && !m_offset);
  243. m_data.reset(); // free old ptr
  244. m_capacity = 0; // to be exception safe
  245. auto ptr = static_cast<dt_byte*>(Trait::alloc(m_comp_node, m_size));
  246. mgb_throw_if(!ptr, SystemError, "failed to allocate memory");
  247. CompNode cn = m_comp_node;
  248. m_data.reset(ptr, [cn](void* p) { Trait::free(cn, p); });
  249. m_capacity = m_size;
  250. }
  251. return m_data.get() + m_offset;
  252. }
  253. template <class Trait>
  254. TensorStorage<Trait>& TensorStorage<Trait>::comp_node(
  255. CompNode node, bool allow_mem_node_change) {
  256. mgb_assert(node.valid());
  257. if (m_comp_node.valid() && node.mem_node() != m_comp_node.mem_node()) {
  258. mgb_assert(allow_mem_node_change);
  259. m_allow_realloc = true;
  260. m_size = m_capacity = m_offset = 0;
  261. m_data.reset();
  262. }
  263. m_comp_node = node;
  264. return *this;
  265. }
  266. template <class Trait>
  267. void TensorStorage<Trait>::reset(CompNode node, size_t size, RawStorage data) {
  268. mgb_assert(m_allow_realloc);
  269. m_comp_node = node;
  270. m_size = size;
  271. m_capacity = size;
  272. m_offset = 0;
  273. m_data = std::move(data);
  274. }
  275. template <class Trait>
  276. template <class RTrait, typename>
  277. TensorStorage<Trait> TensorStorage<Trait>::make_proxy(
  278. const TensorStorage<RTrait>& src) {
  279. mgb_assert(
  280. src.comp_node().mem_node() == CompNode::default_cpu().mem_node(),
  281. "proxy source should be on CPU; got %s",
  282. src.comp_node().to_string().c_str());
  283. src.ptr();
  284. return {true, src.m_comp_node, src.m_size,
  285. src.m_capacity, src.m_offset, src.m_data};
  286. }
  287. template <class Trait>
  288. void TensorStorage<Trait>::on_invalid_comp_node() {
  289. mgb_throw(
  290. MegBrainError,
  291. "trying to acccess TensorStorage with invalid "
  292. "comp node");
  293. }
  294. namespace mgb {
  295. // host to host
  296. template <>
  297. template <>
  298. MGE_WIN_DECLSPEC_FUC void TensorStorage<HostTensorStorageTrait>::copy_from(
  299. const TensorStorage<HostTensorStorageTrait>& src, size_t size) const {
  300. mgb_assert(size <= this->size() && size <= src.size());
  301. memcpy(ptr(), src.ptr(), size);
  302. }
  303. // device to host
  304. template <>
  305. template <>
  306. MGE_WIN_DECLSPEC_FUC void TensorStorage<HostTensorStorageTrait>::copy_from(
  307. const TensorStorage<DeviceTensorStorageTrait>& src, size_t size) const {
  308. bool need_sync = false;
  309. mgb_assert(size <= this->size() && size <= src.size());
  310. if (m_comp_node != src.comp_node()) {
  311. auto default_cpu = CompNode::default_cpu();
  312. if (src.comp_node() != default_cpu) {
  313. mgb_assert(
  314. m_comp_node == default_cpu,
  315. "inconsistent D2H copy:"
  316. " copy from device to host using different comp nodes:"
  317. " device_node=%s host_node=%s",
  318. src.comp_node().to_string().c_str(),
  319. m_comp_node.to_string().c_str());
  320. // copy_from() should use m_comp_node, and default_cpu is
  321. // synchronous with current thread, so this copy has no
  322. // synchronizing ambiguity and we only need to sync on host
  323. need_sync = true;
  324. }
  325. }
  326. src.comp_node().copy_to_host(ptr(), src.ptr(), size);
  327. if (need_sync)
  328. src.comp_node().sync();
  329. }
  330. // host to device
  331. template <>
  332. template <>
  333. MGE_WIN_DECLSPEC_FUC void TensorStorage<DeviceTensorStorageTrait>::copy_from(
  334. const TensorStorage<HostTensorStorageTrait>& src, size_t size) const {
  335. mgb_assert(size <= this->size() && size <= src.size());
  336. m_comp_node.copy_to_device(ptr(), src.ptr(), size);
  337. }
  338. // device to device
  339. template <>
  340. template <>
  341. MGE_WIN_DECLSPEC_FUC void TensorStorage<DeviceTensorStorageTrait>::copy_from(
  342. const TensorStorage<DeviceTensorStorageTrait>& src, size_t size) const {
  343. mgb_assert(size <= this->size() && size <= src.size());
  344. if (src.comp_node().device_type() == CompNode::DeviceType::CPU &&
  345. comp_node().device_type() == CompNode::DeviceType::CUDA) {
  346. // current thread(i.e. cuda dispatcher thread) should wait for all
  347. // operations on src's comp_node to finish, otherwise a race condition
  348. // might occur between the worker thread of src's comp_node and the
  349. // thread responsible for copying pageable memory in \p src to a pinned
  350. // buffer, refer to
  351. // https://docs.nvidia.com/cuda/cuda-runtime-api/api-sync-behavior.html
  352. //
  353. // Note: it is highly recommended that copy tensor from cpu to cuda
  354. // with asynchronized disaptching(see graph option async_exec_level),
  355. // or main thread might be blocked by worker thread corresponding to
  356. // the src's comp_node, resulting in bad performance
  357. //
  358. // TODO: consider using cudaMallocHost or cudaHostRegister
  359. // to pin the memory of src tensor, so it does not require synchronization
  360. // and is more efficient
  361. src.comp_node().sync();
  362. comp_node().copy_to_device(ptr(), src.ptr(), size);
  363. } else {
  364. src.comp_node().peer_copy_to(m_comp_node, ptr(), src.ptr(), size);
  365. }
  366. }
  367. // proxy host to device
  368. template TensorStorage<DeviceTensorStorageTrait> TensorStorage<
  369. DeviceTensorStorageTrait>::
  370. make_proxy<HostTensorStorageTrait, void>(
  371. const TensorStorage<HostTensorStorageTrait>&);
  372. // proxy device to host
  373. template TensorStorage<HostTensorStorageTrait> TensorStorage<HostTensorStorageTrait>::
  374. make_proxy<DeviceTensorStorageTrait, void>(
  375. const TensorStorage<DeviceTensorStorageTrait>&);
  376. } // namespace mgb
  377. /* ===================== TensorND ===================== */
  378. // ctor def {
  379. #define DEF \
  380. template <class TensorStorage> \
  381. TensorND<TensorStorage>::TensorND
  382. DEF() = default;
  383. DEF(CompNode node) : m_storage{node} {}
  384. DEF(DType dtype) : m_layout{dtype} {}
  385. DEF(CompNode node, DType dtype) : m_storage{node}, m_layout{dtype} {}
  386. //! allocate contiguous from given comp node, shape and dtype
  387. DEF(CompNode node, const TensorShape& shape, DType dtype, TensorFormat format)
  388. : m_storage{node}, m_layout{dtype, format} {
  389. resize(shape);
  390. }
  391. //! allocate contiguous from given comp node and layout (strides not
  392. //! used)
  393. DEF(CompNode node, const TensorLayout& layout)
  394. : TensorND(node, layout, layout.dtype, layout.format) {
  395. mgb_assert(
  396. layout.is_contiguous(),
  397. "non-contiguous layout used for initializing a tensor: %s",
  398. layout.to_string().c_str());
  399. }
  400. #undef DEF
  401. // ctor def }
  402. // def {
  403. #define DEF(name, ret) \
  404. template <class TensorStorage> \
  405. typename TensorND<TensorStorage>::ChainReturnType ret \
  406. TensorND<TensorStorage>::name
  407. DEF(resize, &)(const TensorShape& shape) {
  408. mgb_assert(m_layout.dtype.valid());
  409. m_layout.init_contiguous_stride(shape);
  410. m_storage.ensure_size(m_layout.span().dist_byte());
  411. return static_cast<ChainReturnType&>(*this);
  412. }
  413. DEF(reset, &)(TensorStorage storage, const TensorLayout& layout) {
  414. //! The storage to be reset is either satisfy the layout or empty.
  415. //! Empty storage is used after weight preprocess for saving memory and
  416. //! checking layout when running
  417. mgb_assert(!layout.ndim || storage.valid_span(layout.span()) || storage.empty());
  418. m_storage = std::move(storage);
  419. m_layout = layout;
  420. return static_cast<ChainReturnType&>(*this);
  421. }
  422. DEF(comp_node, &)(CompNode comp_node, bool allow_mem_node_change) {
  423. auto orig_cn = m_storage.comp_node_allow_invalid();
  424. m_storage.comp_node(comp_node, allow_mem_node_change);
  425. if (orig_cn.valid() && orig_cn.mem_node() != comp_node.mem_node()) {
  426. m_layout.ndim = 0;
  427. }
  428. return static_cast<ChainReturnType&>(*this);
  429. }
  430. DEF(storage, &)(const TensorStorage& storage) {
  431. if (m_storage.empty() || storage.empty() || m_storage.ptr() != storage.ptr()) {
  432. m_storage = storage;
  433. m_layout.ndim = 0;
  434. }
  435. return static_cast<ChainReturnType&>(*this);
  436. }
  437. DEF(dtype, &)(DType dtype) {
  438. if (m_layout.dtype != dtype) {
  439. m_layout.modify_dtype_inplace(dtype);
  440. m_layout.ndim = 0;
  441. }
  442. return static_cast<ChainReturnType&>(*this);
  443. }
  444. DEF(format, &)(TensorFormat format) {
  445. if (m_layout.format != format) {
  446. m_layout.format = format;
  447. m_layout.ndim = 0;
  448. }
  449. return static_cast<ChainReturnType&>(*this);
  450. }
  451. DEF(operator[], )(std::initializer_list<Slice> slice) const {
  452. auto subspec = SubTensorSpec::make_from_offset_elem(m_layout, 0);
  453. size_t axis = 0;
  454. for (auto&& i : slice) {
  455. subspec.merge_with(i.apply(subspec.layout(), axis));
  456. axis++;
  457. }
  458. return sub(subspec);
  459. }
  460. DEF(sub, )(const SubTensorSpec& spec) const {
  461. mgb_assert(
  462. spec.layout().dtype == dtype() && spec.layout().format == format(),
  463. "invalid subtensor spec: sub_layout=%s self=%s",
  464. spec.layout().to_string().c_str(), m_layout.to_string().c_str());
  465. ChainReturnType rst;
  466. rst.reset(m_storage.sub(spec.offset_byte()), spec.layout());
  467. return rst;
  468. }
  469. #undef DEF
  470. // def }
  471. /* ===================== TensorND::copy_from ===================== */
  472. namespace {
  473. /**
  474. * \brief determine whether to check overlap of two tensors.
  475. * \return true : when HostStorage || (DeviceStorage && SUPPORT_UNIFIED_ADDRESS)
  476. * \note when both support unified address, we can treat them both on CPU. So,
  477. * overlap check should be done
  478. */
  479. template <typename TensorStorage, typename RStorage>
  480. inline bool should_check_overlap(
  481. const TensorND<TensorStorage>& dst, const TensorND<RStorage>& src) {
  482. return true;
  483. }
  484. template <>
  485. inline bool should_check_overlap<HostTensorStorage, DeviceTensorStorage>(
  486. const HostTensorND& dst, const DeviceTensorND& src) {
  487. return src.comp_node().contain_flag(CompNode::Flag::SUPPORT_UNIFIED_ADDRESS);
  488. }
  489. template <>
  490. inline bool should_check_overlap<DeviceTensorStorage, HostTensorStorage>(
  491. const DeviceTensorND& dst, const HostTensorND& src) {
  492. return dst.comp_node().contain_flag(CompNode::Flag::SUPPORT_UNIFIED_ADDRESS);
  493. }
  494. /**
  495. * \brief D2D tensor copy should check overlap when
  496. * 1. They are on the same mem node. But note that the address must be logical
  497. * comparable. i.e. the original address alloc on enflame is uncomparable.
  498. * 2. They both support unified address, so can be treated as CPU address.
  499. */
  500. template <>
  501. inline bool should_check_overlap<DeviceTensorStorage, DeviceTensorStorage>(
  502. const DeviceTensorND& dst, const DeviceTensorND& src) {
  503. bool is_same_memnode = dst.comp_node().mem_node() == src.comp_node().mem_node();
  504. bool unified_address =
  505. src.comp_node().contain_flag(CompNode::Flag::SUPPORT_UNIFIED_ADDRESS) &&
  506. dst.comp_node().contain_flag(CompNode::Flag::SUPPORT_UNIFIED_ADDRESS);
  507. return is_same_memnode || unified_address;
  508. }
  509. /**
  510. * \brief check overlap of two tensors. throw exception when overlapped
  511. */
  512. inline void check_overlapped(
  513. const dt_byte* dst_min, const dt_byte* dst_max, const dt_byte* src_min,
  514. const dt_byte* src_max) {
  515. mgb_throw_if(
  516. src_min < dst_max && dst_min < src_max, TensorCopyOverlapError,
  517. "cound not perform copy between overlapped tensors");
  518. }
  519. } // namespace
  520. template <class TensorStorage>
  521. template <class RStorage>
  522. typename TensorND<TensorStorage>::ChainReturnType& TensorND<TensorStorage>::copy_from(
  523. const TensorND<RStorage>& src) {
  524. if (!m_storage.comp_node_valid())
  525. m_storage.comp_node(src.comp_node());
  526. if (m_layout.dtype.valid())
  527. m_layout.dtype.assert_is(src.dtype());
  528. else
  529. m_layout.dtype = src.dtype();
  530. m_layout = TensorLayout(src.shape(), m_layout.dtype);
  531. size_t size_bytes = m_layout.span().dist_byte();
  532. m_storage.ensure_size(size_bytes);
  533. if (!size_bytes) {
  534. return static_cast<ChainReturnType&>(*this);
  535. }
  536. // requirement:
  537. // default case, physical contiguous
  538. // lowbit aligned, logical contiguous
  539. if (src.layout().is_physical_contiguous() ||
  540. (src.layout().format.is_lowbit_aligned() && src.layout().is_contiguous())) {
  541. if (should_check_overlap(*this, src)) {
  542. check_overlapped(
  543. m_storage.ptr(), m_storage.ptr() + size_bytes, src.storage().ptr(),
  544. src.storage().ptr() + size_bytes);
  545. }
  546. m_storage.copy_from(src.storage(), size_bytes);
  547. return static_cast<ChainReturnType&>(*this);
  548. }
  549. return const_cast<ChainReturnType&>(copy_from_fixlayout(src));
  550. }
  551. template <class TensorStorage>
  552. template <class RStorage>
  553. const typename TensorND<TensorStorage>::ChainReturnType& TensorND<
  554. TensorStorage>::copy_from_fixlayout(const TensorND<RStorage>& src) const {
  555. dtype().assert_is(src.dtype());
  556. mgb_assert(
  557. m_layout.eq_shape(src.layout()),
  558. "shape differs in copy_from_fixlayout: %s vs %s",
  559. static_cast<const TensorShape&>(m_layout).to_string().c_str(),
  560. static_cast<const TensorShape&>(src.layout()).to_string().c_str());
  561. if (src.empty()) {
  562. return static_cast<const ChainReturnType&>(*this);
  563. }
  564. mgb_assert(
  565. m_layout.is_non_overlapping_strong(),
  566. "copy dest must have non-overlapping layout");
  567. TensorLayout::Span src_span = src.layout().span(), dst_span = layout().span();
  568. if (should_check_overlap(*this, src)) {
  569. check_overlapped(
  570. this->raw_ptr() + dst_span.low_byte,
  571. this->raw_ptr() + dst_span.high_byte, src.raw_ptr() + src_span.low_byte,
  572. src.raw_ptr() + src_span.high_byte);
  573. }
  574. bool self_contig =
  575. m_layout.is_physical_contiguous() ||
  576. (m_layout.format.is_lowbit_aligned() && m_layout.is_contiguous()),
  577. src_contig = src.layout().is_physical_contiguous() ||
  578. (src.layout().format.is_lowbit_aligned() &&
  579. src.layout().is_contiguous());
  580. if (self_contig && src_contig) {
  581. if ((m_layout.format.is_default() && src.layout().format.is_default()) ||
  582. (m_layout.format.is_lowbit_aligned() &&
  583. src.layout().format.is_lowbit_aligned())) {
  584. mgb_assert(
  585. src_span.low_byte == 0 && dst_span.low_byte == 0 &&
  586. src_span.high_byte == dst_span.high_byte);
  587. m_storage.copy_from(src.storage(), src_span.high_byte);
  588. } else {
  589. mgb_assert(src_span.low_byte == 0 && dst_span.low_byte == 0);
  590. m_storage.copy_from(
  591. src.storage(), std::min(src_span.high_byte, dst_span.high_byte));
  592. }
  593. return static_cast<const ChainReturnType&>(*this);
  594. }
  595. noncont_tensor_copy(*this, src, self_contig, src_contig);
  596. return static_cast<const ChainReturnType&>(*this);
  597. }
  598. /* =================== misc =================== */
  599. void mgb::dev_tensor_memset(const DeviceTensorND& tensor, int val) {
  600. auto&& env = CompNodeEnv::from_comp_node(tensor.comp_node());
  601. env.activate();
  602. void* ptr = tensor.raw_ptr();
  603. size_t size = tensor.layout().span().dist_byte();
  604. switch (env.property().type) {
  605. #if MGB_CUDA
  606. case CompNode::DeviceType::CUDA:
  607. MGB_CUDA_CHECK(cudaMemsetAsync(ptr, val, size, env.cuda_env().stream));
  608. break;
  609. #endif
  610. #if MGB_ATLAS
  611. case CompNode::DeviceType::ATLAS:
  612. #if MGB_USE_ATLAS_ASYNC_API
  613. MGB_ATLAS_CHECK(
  614. aclrtMemsetAsync(ptr, -1, val, size, env.atlas_env().stream));
  615. #else
  616. MGB_ATLAS_CHECK(aclrtMemset(ptr, -1, val, size));
  617. #endif
  618. break;
  619. #endif
  620. #if MGB_CAMBRICON
  621. case CompNode::DeviceType::CAMBRICON:
  622. MGB_CNRT_CHECK(cnrtSyncQueue(env.cnrt_env().queue));
  623. MGB_CNRT_CHECK(cnrtMemset(ptr, val, size));
  624. break;
  625. #endif
  626. case CompNode::DeviceType::CPU: {
  627. auto fill = [ptr, size, val]() { std::memset(ptr, val, size); };
  628. env.cpu_env().dispatch(fill);
  629. } break;
  630. default:
  631. mgb_throw(
  632. MegBrainError, "unhandled comp node in dev_tensor_memset: %s",
  633. tensor.comp_node().to_string().c_str());
  634. }
  635. }
  636. namespace mgb {
  637. template class TensorStorage<HostTensorStorageTrait>;
  638. template class TensorStorage<DeviceTensorStorageTrait>;
  639. template class TensorND<TensorStorage<HostTensorStorageTrait>>;
  640. template class TensorND<TensorStorage<DeviceTensorStorageTrait>>;
  641. /* ===== copy_from related ===== */
  642. #define HT_RAW TensorND<HostTensorStorage>
  643. #define DT_RAW TensorND<DeviceTensorStorage>
  644. #define HT(f) f<HostTensorStorage>(const HT_RAW&)
  645. #define DT(f) f<DeviceTensorStorage>(const DT_RAW&)
  646. #define INST(f, c) \
  647. template c HostTensorND& HT_RAW::HT(f) c; \
  648. template c HostTensorND& HT_RAW::DT(f) c; \
  649. template c DeviceTensorND& DT_RAW::HT(f) c; \
  650. template c DeviceTensorND& DT_RAW::DT(f) c
  651. INST(copy_from, );
  652. INST(copy_from_fixlayout, const);
  653. #undef INST
  654. #undef DT
  655. #undef HT
  656. #undef DT_RAW
  657. #undef HT_RAW
  658. } // namespace mgb
  659. // vim: syntax=cpp.doxygen foldmethod=marker foldmarker=f{{{,f}}}

MegEngine 安装包中集成了使用 GPU 运行代码所需的 CUDA 环境,不用区分 CPU 和 GPU 版。 如果想要运行 GPU 程序,请确保机器本身配有 GPU 硬件设备并安装好驱动。 如果你想体验在云端 GPU 算力平台进行深度学习开发的感觉,欢迎访问 MegStudio 平台