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conv_bias.cpp 59 kB

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  1. /**
  2. * \file dnn/test/cuda/conv_bias.cpp
  3. * MegEngine is Licensed under the Apache License, Version 2.0 (the "License")
  4. *
  5. * Copyright (c) 2014-2021 Megvii Inc. All rights reserved.
  6. *
  7. * Unless required by applicable law or agreed to in writing,
  8. * software distributed under the License is distributed on an
  9. * "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  10. */
  11. #include "megdnn/dtype.h"
  12. #include "test/cuda/fixture.h"
  13. #include "megdnn/opr_param_defs.h"
  14. #include "megdnn/oprs.h"
  15. #include "src/cuda/handle.h"
  16. #include "test/common/benchmarker.h"
  17. #include "test/common/checker.h"
  18. #include "test/common/conv_bias.h"
  19. #include "test/common/rng.h"
  20. #include "test/common/tensor.h"
  21. #include "test/common/workspace_wrapper.h"
  22. #include "test/cuda/utils.h"
  23. using namespace megdnn;
  24. using namespace test;
  25. using namespace conv_bias;
  26. namespace {
  27. #if CUDA_VERSION >= 10000
  28. void test_conv_bias_forward_wmma_int4_nchw8(Handle* handle_cuda, size_t fh) {
  29. require_compute_capability(7, 5);
  30. using namespace conv_bias;
  31. Checker<ConvBiasForward> checker(handle_cuda);
  32. UniformIntRNG int_rng{0, 8};
  33. ConvBias::Param param;
  34. param.format = ConvBias::Param::Format::NCHW8;
  35. using NonlineMode = ConvBias::Param::NonlineMode;
  36. for (NonlineMode mode : {NonlineMode::RELU}) {
  37. for (size_t batch : {1}) {
  38. for (size_t ic : {128, 32}) {
  39. for (size_t oc : {32}) {
  40. for (int ph : {static_cast<int>(fh / 2), 0}) {
  41. for (size_t ih : {8, 9, 13, 15, 16}) {
  42. for (size_t iw : {8, 16, 24, 32, 40}) {
  43. param.nonlineMode = mode;
  44. param.stride_h = param.stride_w = 1;
  45. param.pad_h = param.pad_w = ph;
  46. checker.set_dtype(
  47. 0, dtype::Quantized4Asymm(
  48. 1.3f, (uint8_t)(1)))
  49. .set_dtype(
  50. 1, dtype::Quantized4Asymm(
  51. 1.3f, (uint8_t)(2)))
  52. .set_dtype(2, dtype::QuantizedS32(1.3f * 1.3f))
  53. .set_dtype(4, dtype::QuantizedS32(1.3f * 1.3f))
  54. .set_rng(0, &int_rng)
  55. .set_rng(1, &int_rng)
  56. .set_rng(2, &int_rng)
  57. .set_param(param);
  58. if (!ph)
  59. iw += 2 * (fh / 2);
  60. size_t oh = infer_conv_shape(ih, fh, 1, ph);
  61. size_t ow = infer_conv_shape(iw, fh, 1, ph);
  62. if (ow % 8 != 0)
  63. continue;
  64. checker.execs(
  65. {{batch, ic / 8, ih, iw, 8},
  66. {oc, ic / 8, fh, fh, 8},
  67. {1, oc / 8, 1, 1, 8},
  68. {},
  69. {}});
  70. checker.execs(
  71. {{batch, ic / 8, ih, iw, 8},
  72. {oc, ic / 8, fh, fh, 8},
  73. {batch, oc / 8, oh, ow, 8},
  74. {},
  75. {}});
  76. }
  77. }
  78. }
  79. }
  80. }
  81. }
  82. }
  83. }
  84. #endif
  85. } // namespace
  86. #if CUDNN_VERSION >= 7400
  87. TEST_F(CUDA, CONV_BIAS_FORWARD_F32) {
  88. using namespace conv_bias;
  89. std::vector<TestArg> args = get_args();
  90. Checker<ConvBiasForward> checker(handle_cuda());
  91. NormalRNG default_rng;
  92. for (auto&& arg : args) {
  93. checker.set_dtype(0, dtype::Float32())
  94. .set_dtype(1, dtype::Float32())
  95. .set_dtype(2, dtype::Float32())
  96. .set_rng(0, &default_rng)
  97. .set_rng(1, &default_rng)
  98. .set_rng(2, &default_rng)
  99. .set_epsilon(1e-3)
  100. .set_param(arg.param)
  101. .execs({arg.src, arg.filter, arg.bias, {}, {}});
  102. }
  103. }
  104. TEST_F(CUDA, CONV_BIAS_FORWARD_BF16) {
  105. using namespace conv_bias;
  106. std::vector<TestArg> args = get_args();
  107. Checker<ConvBiasForward> checker(handle_cuda());
  108. checker.set_before_exec_callback(AlgoChecker<ConvBiasForward>(
  109. ExecutionPolicyAlgoName{"CONVBIAS_BFLOAT16", {{"MATMUL", {}}}}));
  110. NormalRNG default_rng;
  111. for (auto&& arg : args) {
  112. arg.param.compute_mode = param::Convolution::ComputeMode::FLOAT32;
  113. checker.set_dtype(0, dtype::BFloat16())
  114. .set_dtype(1, dtype::BFloat16())
  115. .set_dtype(2, dtype::BFloat16())
  116. .set_dtype(3, dtype::BFloat16())
  117. .set_dtype(4, dtype::BFloat16())
  118. .set_rng(0, &default_rng)
  119. .set_rng(1, &default_rng)
  120. .set_rng(2, &default_rng)
  121. .set_epsilon(2e-2)
  122. .set_param(arg.param)
  123. .execs({arg.src, arg.filter, arg.bias, {}, {}});
  124. }
  125. }
  126. TEST_F(CUDA, CONV_BIAS_FORWARD_QS8) {
  127. require_compute_capability(6, 1);
  128. UniformIntRNG int_rng{-50, 50};
  129. Checker<ConvBiasForward> checker(handle_cuda());
  130. ConvBias::Param param;
  131. param.format = ConvBias::Param::Format::NHWC;
  132. param.nonlineMode = ConvBias::Param::NonlineMode::IDENTITY;
  133. {
  134. auto src_shape = TensorShape{20, 224, 224, 4};
  135. auto filter_shape = TensorShape{24, 1, 1, 4};
  136. auto bias_shape = TensorShape{1, 1, 1, 24};
  137. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  138. .set_dtype(1, dtype::QuantizedS8(2.5f))
  139. .set_dtype(2, dtype::QuantizedS32(6.25f))
  140. .set_dtype(4, dtype::QuantizedS8(60.25f))
  141. .set_rng(0, &int_rng)
  142. .set_rng(1, &int_rng)
  143. .set_rng(2, &int_rng)
  144. .set_param(param)
  145. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  146. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  147. .set_dtype(1, dtype::QuantizedS8(2.5f))
  148. .set_dtype(2, dtype::QuantizedS32(6.25f))
  149. .set_dtype(4, dtype::QuantizedS8(40.25f))
  150. .set_rng(0, &int_rng)
  151. .set_rng(1, &int_rng)
  152. .set_rng(2, &int_rng)
  153. .set_param(param)
  154. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  155. }
  156. {
  157. auto src_shape = TensorShape{20, 224, 224, 4};
  158. auto filter_shape = TensorShape{24, 1, 1, 4};
  159. auto bias_shape = TensorShape{1, 1, 1, 24};
  160. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  161. .set_dtype(1, dtype::QuantizedS8(2.5f))
  162. .set_dtype(2, dtype::QuantizedS32(6.25f))
  163. .set_dtype(4, dtype::QuantizedS8(60.25f))
  164. .set_rng(0, &int_rng)
  165. .set_rng(1, &int_rng)
  166. .set_rng(2, &int_rng)
  167. .set_param(param)
  168. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  169. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  170. .set_dtype(1, dtype::QuantizedS8(2.5f))
  171. .set_dtype(2, dtype::QuantizedS32(6.25f))
  172. .set_dtype(4, dtype::QuantizedS8(40.25f))
  173. .set_rng(0, &int_rng)
  174. .set_rng(1, &int_rng)
  175. .set_rng(2, &int_rng)
  176. .set_param(param)
  177. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  178. }
  179. {
  180. param.sparse = ConvBias::Param::Sparse::GROUP;
  181. auto src_shape = TensorShape{20, 224, 224, 16};
  182. auto filter_shape = TensorShape{4, 4, 1, 1, 4};
  183. auto bias_shape = TensorShape{1, 1, 1, 16};
  184. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  185. .set_dtype(1, dtype::QuantizedS8(2.5f))
  186. .set_dtype(2, dtype::QuantizedS32(6.25f))
  187. .set_dtype(4, dtype::QuantizedS8(60.25f))
  188. .set_rng(0, &int_rng)
  189. .set_rng(1, &int_rng)
  190. .set_rng(2, &int_rng)
  191. .set_param(param)
  192. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  193. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  194. .set_dtype(1, dtype::QuantizedS8(2.5f))
  195. .set_dtype(2, dtype::QuantizedS32(6.25f))
  196. .set_dtype(4, dtype::QuantizedS8(40.25f))
  197. .set_rng(0, &int_rng)
  198. .set_rng(1, &int_rng)
  199. .set_rng(2, &int_rng)
  200. .set_param(param)
  201. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  202. }
  203. }
  204. TEST_F(CUDA, CONV_BIAS_FORWARD_FLOAT16) {
  205. require_compute_capability(6, 1);
  206. Checker<ConvBiasForward> checker(handle_cuda());
  207. ConvBias::Param param;
  208. param.format = ConvBias::Param::Format::NHWC;
  209. param.nonlineMode = ConvBias::Param::NonlineMode::IDENTITY;
  210. checker.set_epsilon(2e-2)
  211. .set_dtype(0, dtype::Float16())
  212. .set_dtype(1, dtype::Float16())
  213. .set_dtype(2, dtype::Float16())
  214. .set_dtype(3, dtype::Float16())
  215. .set_dtype(4, dtype::Float16());
  216. {
  217. auto src_shape = TensorShape{20, 224, 224, 4};
  218. auto filter_shape = TensorShape{24, 1, 1, 4};
  219. auto bias_shape = TensorShape{1, 1, 1, 24};
  220. checker.set_param(param).execs({src_shape, filter_shape, bias_shape, {}, {}});
  221. param.compute_mode = ConvBias::Param::ComputeMode::FLOAT32;
  222. checker.set_param(param).execs({src_shape, filter_shape, bias_shape, {}, {}});
  223. }
  224. {
  225. param.sparse = ConvBias::Param::Sparse::GROUP;
  226. auto src_shape = TensorShape{20, 224, 224, 16};
  227. auto filter_shape = TensorShape{4, 4, 1, 1, 4};
  228. auto bias_shape = TensorShape{1, 1, 1, 16};
  229. checker.set_param(param).execs({src_shape, filter_shape, bias_shape, {}, {}});
  230. }
  231. }
  232. TEST_F(CUDA, CONV_BIAS_NCHW_QS8) {
  233. //! not support NonlineMode::SIGMOID and NonlineMode::H_SWISH
  234. require_compute_capability(6, 1);
  235. Checker<ConvBiasForward> checker(handle_cuda());
  236. UniformIntRNG int_rng{-128, 127};
  237. using NonlineMode = ConvBias::Param::NonlineMode;
  238. ConvBias::Param param;
  239. param.format = ConvBias::Param::Format::NCHW;
  240. checker.set_dtype(0, dtype::QuantizedS8(1.f))
  241. .set_dtype(1, dtype::QuantizedS8(1.f))
  242. .set_dtype(2, dtype::QuantizedS32(1.f))
  243. .set_dtype(3, dtype::QuantizedS8(1.f))
  244. .set_dtype(4, dtype::QuantizedS8(1.f))
  245. .set_rng(0, &int_rng)
  246. .set_rng(1, &int_rng)
  247. .set_rng(2, &int_rng)
  248. .set_rng(3, &int_rng);
  249. for (NonlineMode mode :
  250. {NonlineMode::RELU, NonlineMode::IDENTITY, NonlineMode::H_SWISH}) {
  251. for (size_t g : {1, 2}) {
  252. for (size_t b : {2}) {
  253. for (size_t ic : {6, 16}) {
  254. for (size_t oc : {4}) {
  255. for (size_t fh : {1, 3}) {
  256. for (int ph : {static_cast<int>(fh / 2)}) {
  257. for (int sh : {1, 2}) {
  258. size_t ih = 16, iw = 16;
  259. param.nonlineMode = mode;
  260. param.stride_h = param.stride_w = sh;
  261. param.pad_h = param.pad_w = ph;
  262. param.sparse = ConvBias::Param::Sparse::DENSE;
  263. checker.set_param(param).execs(
  264. {{b, ic / 2, ih, iw},
  265. {oc, ic / 2, fh, fh},
  266. {1, oc, 1, 1},
  267. {},
  268. {}});
  269. param.sparse = ConvBias::Param::Sparse::GROUP;
  270. checker.set_param(param).execs(
  271. {{b, ic, ih, iw},
  272. {g, oc / g, ic / g, fh, fh},
  273. {1, oc, 1, 1},
  274. {},
  275. {}});
  276. }
  277. }
  278. }
  279. }
  280. }
  281. }
  282. }
  283. }
  284. for (NonlineMode mode :
  285. {NonlineMode::RELU, NonlineMode::IDENTITY, NonlineMode::H_SWISH}) {
  286. for (size_t g : {13}) {
  287. for (size_t b : {1, 2}) {
  288. for (size_t ic : {13}) {
  289. for (size_t oc : {13}) {
  290. for (size_t fh : {1, 3}) {
  291. for (int ph : {static_cast<int>(fh / 2)}) {
  292. for (int sh : {1, 2}) {
  293. size_t ih = 16, iw = 16;
  294. param.nonlineMode = mode;
  295. param.stride_h = param.stride_w = sh;
  296. param.pad_h = param.pad_w = ph;
  297. param.sparse = ConvBias::Param::Sparse::GROUP;
  298. checker.set_param(param).execs(
  299. {{b, ic, ih, iw},
  300. {g, oc / g, ic / g, fh, fh},
  301. {1, oc, 1, 1},
  302. {},
  303. {}});
  304. }
  305. }
  306. }
  307. }
  308. }
  309. }
  310. }
  311. }
  312. {
  313. size_t ih = 16, iw = 16, b = 1, oc = 14, ic = 14;
  314. size_t fh = 3, sh = 1, ph = 1;
  315. param.nonlineMode = NonlineMode::IDENTITY;
  316. param.stride_h = param.stride_w = sh;
  317. param.pad_h = param.pad_w = ph;
  318. param.sparse = ConvBias::Param::Sparse::DENSE;
  319. checker.set_param(param).execs({{b, ic, ih, iw}, {oc, ic, fh, fh}, {}, {}, {}});
  320. }
  321. }
  322. TEST_F(CUDA, CONV_BIAS_NCHW_QS8_FUSE_Z) {
  323. require_compute_capability(6, 1);
  324. Checker<ConvBiasForward> checker(handle_cuda());
  325. UniformIntRNG int_rng{-128, 127};
  326. using NonlineMode = ConvBias::Param::NonlineMode;
  327. ConvBias::Param param;
  328. param.format = ConvBias::Param::Format::NCHW;
  329. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  330. .set_dtype(1, dtype::QuantizedS8(2.5f))
  331. .set_dtype(2, dtype::QuantizedS32(6.25f))
  332. .set_dtype(3, dtype::QuantizedS8(0.25f))
  333. .set_dtype(4, dtype::QuantizedS8(0.25f))
  334. .set_rng(0, &int_rng)
  335. .set_rng(1, &int_rng)
  336. .set_rng(2, &int_rng)
  337. .set_rng(3, &int_rng);
  338. for (NonlineMode mode :
  339. {NonlineMode::RELU, NonlineMode::IDENTITY, NonlineMode::H_SWISH}) {
  340. for (size_t b : {2}) {
  341. for (size_t ic : {6, 16}) {
  342. for (size_t oc : {4}) {
  343. for (size_t fh : {1, 3}) {
  344. for (int ph : {static_cast<int>(fh / 2)}) {
  345. for (int sh : {1, 2}) {
  346. size_t ih = 16, iw = 16;
  347. param.nonlineMode = mode;
  348. param.stride_h = param.stride_w = sh;
  349. param.pad_h = param.pad_w = ph;
  350. param.sparse = ConvBias::Param::Sparse::DENSE;
  351. const size_t oh = (ih - fh + 2 * ph) / sh + 1;
  352. const size_t ow = (iw - fh + 2 * ph) / sh + 1;
  353. checker.set_param(param).execs(
  354. {{b, ic, ih, iw},
  355. {oc, ic, fh, fh},
  356. {1, oc, 1, 1},
  357. {b, oc, oh, ow},
  358. {}});
  359. }
  360. }
  361. }
  362. }
  363. }
  364. }
  365. }
  366. }
  367. #if MEGDNN_WITH_BENCHMARK
  368. TEST_F(CUDA, BENCHMARK_CONV_BIAS_NCHW4_INT8) {
  369. require_compute_capability(6, 1);
  370. Benchmarker<ConvBiasForward> bencher(handle_cuda());
  371. bencher.set_display(false);
  372. ConvBias::Param param_nchw;
  373. param_nchw.format = ConvBias::Param::Format::NCHW;
  374. ConvBias::Param param_nchw4;
  375. param_nchw4.format = ConvBias::Param::Format::NCHW4;
  376. auto i8_min = std::numeric_limits<int8_t>().min();
  377. auto i8_max = std::numeric_limits<int8_t>().max();
  378. UniformIntRNG int_rng{i8_min, i8_max};
  379. param_nchw.nonlineMode = ConvBias::Param::NonlineMode::IDENTITY;
  380. auto run_bench = [&](size_t b, size_t ci, size_t hi, size_t wi, size_t co,
  381. size_t fh, size_t fw, size_t sh, size_t sw, size_t nr_times) {
  382. param_nchw.pad_h = fh / 2;
  383. param_nchw.pad_w = fw / 2;
  384. param_nchw.stride_h = sh;
  385. param_nchw.stride_w = sw;
  386. param_nchw4.pad_h = fh / 2;
  387. param_nchw4.pad_w = fh / 2;
  388. param_nchw4.stride_h = sh;
  389. param_nchw4.stride_w = sw;
  390. bencher.set_times(nr_times)
  391. .set_dtype(0, dtype::QuantizedS8(2.5f))
  392. .set_dtype(1, dtype::QuantizedS8(2.5f))
  393. .set_dtype(2, dtype::QuantizedS32(6.25f))
  394. .set_dtype(4, dtype::QuantizedS8(0.35f))
  395. .set_rng(0, &int_rng)
  396. .set_rng(1, &int_rng)
  397. .set_rng(2, &int_rng);
  398. bencher.set_param(param_nchw);
  399. size_t ho = infer_conv_shape(hi, fh, sh, param_nchw.pad_h);
  400. size_t wo = infer_conv_shape(wi, fw, sw, param_nchw.pad_w);
  401. TensorShape inp{b, ci, hi, wi}, kern{co, ci, fh, fw}, out{b, co, ho, wo};
  402. auto time_in_ms = bencher.execs({inp, kern, {1, co, 1, 1}, {}, out}) / nr_times;
  403. auto ops_nchw =
  404. 2.0 * b * co * ho * wo * ci * fh * fw / (time_in_ms * 1e-3) * 1e-12;
  405. printf("inp=%s, kern=%s, out=%s, time: %.2fms, perf: %.2f Tops "
  406. "(NCHW)\n",
  407. inp.to_string().c_str(), kern.to_string().c_str(),
  408. out.to_string().c_str(), time_in_ms, ops_nchw);
  409. bencher.set_param(param_nchw4);
  410. decltype(ops_nchw) ops_nchw4;
  411. {
  412. TensorShape inp{b, ci / 4, hi, wi, 4}, kern{co, ci / 4, fh, fw, 4},
  413. out{b, co / 4, ho, wo, 4};
  414. auto time_in_ms =
  415. bencher.execs({inp, kern, {1, co / 4, 1, 1, 4}, {}, out}) /
  416. nr_times;
  417. ops_nchw4 =
  418. 2.0 * b * co * ho * wo * ci * fh * fw / (time_in_ms * 1e-3) * 1e-12;
  419. printf("inp=%s, kern=%s, out=%s, time: %.2fms, perf: %.2f Tops "
  420. "(NCHW4)\n",
  421. inp.to_string().c_str(), kern.to_string().c_str(),
  422. out.to_string().c_str(), time_in_ms, ops_nchw4);
  423. }
  424. printf("speedup: %.2fx\n", ops_nchw4 / ops_nchw);
  425. };
  426. // resnet-50
  427. // bottleneck-1
  428. // proj
  429. run_bench(1, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  430. run_bench(1, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  431. run_bench(1, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  432. run_bench(1, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  433. // bottleneck-2
  434. // proj
  435. run_bench(1, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  436. run_bench(1, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  437. run_bench(1, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  438. run_bench(1, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  439. // bottleneck-3
  440. // proj
  441. run_bench(1, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  442. run_bench(1, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  443. run_bench(1, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  444. run_bench(1, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  445. // bottleneck-4
  446. // proj
  447. run_bench(1, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  448. run_bench(1, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  449. run_bench(1, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  450. run_bench(1, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  451. run_bench(32, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  452. run_bench(32, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  453. run_bench(32, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  454. run_bench(32, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  455. run_bench(32, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  456. run_bench(32, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  457. run_bench(32, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  458. run_bench(32, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  459. run_bench(32, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  460. run_bench(32, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  461. run_bench(32, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  462. run_bench(32, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  463. run_bench(32, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  464. run_bench(32, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  465. run_bench(32, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  466. run_bench(32, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  467. run_bench(256, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  468. run_bench(256, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  469. run_bench(256, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  470. run_bench(256, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  471. run_bench(256, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  472. run_bench(256, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  473. run_bench(256, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  474. run_bench(256, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  475. run_bench(256, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  476. run_bench(256, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  477. run_bench(256, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  478. run_bench(256, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  479. run_bench(256, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  480. run_bench(256, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  481. run_bench(256, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  482. run_bench(256, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  483. }
  484. #endif
  485. TEST_F(CUDA, CONV_BIAS_FORWARD_NCHW4) {
  486. require_compute_capability(6, 1);
  487. using namespace conv_bias;
  488. Checker<ConvBiasForward> checker(handle_cuda());
  489. UniformIntRNG int_rng{-5, 5};
  490. ConvBias::Param param;
  491. param.format = ConvBias::Param::Format::NCHW4;
  492. param.nonlineMode = ConvBias::Param::NonlineMode::IDENTITY;
  493. checker.set_dtype(0, dtype::QuantizedS8(0.5f))
  494. .set_dtype(1, dtype::QuantizedS8(0.5f))
  495. .set_dtype(2, dtype::QuantizedS32(0.25f))
  496. .set_dtype(3, dtype::QuantizedS8(0.13f))
  497. .set_dtype(4, dtype::QuantizedS8(0.35f))
  498. .set_rng(0, &int_rng)
  499. .set_rng(1, &int_rng)
  500. .set_rng(2, &int_rng)
  501. .set_rng(3, &int_rng)
  502. .set_param(param);
  503. auto opr = handle_cuda()->create_operator<ConvBias>();
  504. auto run = [&](const TensorShapeArray& shapes) {
  505. opr->param() = param;
  506. TensorLayout dst_layout;
  507. opr->deduce_layout(
  508. {shapes[0], dtype::Float32()}, {shapes[1], dtype::Float32()}, {}, {},
  509. dst_layout);
  510. checker.execs({shapes[0], shapes[1], shapes[2], dst_layout, {}});
  511. };
  512. run({{1, 4, 4, 4, 4}, {4, 4, 3, 3, 4}, {1, 1, 1, 1, 4}});
  513. run({{1, 4, 4, 4, 4}, {260, 4, 3, 3, 4}, {1, 65, 1, 1, 4}});
  514. run({{20, 1, 24, 24, 4}, {24, 1, 2, 2, 4}, {1, 6, 1, 1, 4}});
  515. run({{20, 2, 24, 24, 4}, {24, 2, 3, 3, 4}, {1, 6, 1, 1, 4}});
  516. param.sparse = ConvBias::Param::Sparse::GROUP;
  517. checker.set_param(param);
  518. run({{1, 4, 24, 24, 4}, {4, 4, 1, 1, 1, 4}, {1, 4, 1, 1, 4}});
  519. run({{20, 8, 24, 24, 4}, {4, 24, 2, 2, 2, 4}, {1, 24, 1, 1, 4}});
  520. run({{1, 3, 24, 24, 4}, {3, 8, 1, 3, 3, 4}, {1, 6, 1, 1, 4}});
  521. param.pad_h = param.pad_w = 1;
  522. param.stride_h = param.stride_w = 2;
  523. checker.set_param(param);
  524. run({{10, 16, 28, 28, 4}, {8, 8, 2, 3, 3, 4}, {1, 16, 1, 1, 4}});
  525. // case which cudnn not supported
  526. param.sparse = ConvBias::Param::Sparse::DENSE;
  527. param.pad_h = param.pad_w = 1;
  528. param.stride_h = param.stride_w = 1;
  529. checker.set_param(param);
  530. checker.exec({{1, 4, 2, 2, 4}, {16, 4, 3, 3, 4}, {1, 4, 1, 1, 4}, {}, {}});
  531. }
  532. //! FIXME: conv kernel of cudnn for NCHW4_NCHW tensor format causes illegal
  533. //! memory access errors, so we have to disable this test here.
  534. #if 0
  535. TEST_F(CUDA, CONV_BIAS_FORWARD_NCHW4_NCHW) {
  536. require_compute_capability(6, 1);
  537. using namespace conv_bias;
  538. Checker<ConvBiasForward> checker(handle_cuda());
  539. UniformIntRNG int_rng{-3, 3};
  540. UniformFloatRNG float_rng{-50, 50};
  541. ConvBias::Param param;
  542. param.format = ConvBias::Param::Format::NCHW4_NCHW;
  543. param.nonlineMode = ConvBias::Param::NonlineMode::IDENTITY;
  544. checker.set_dtype(0, dtype::QuantizedS8(1.9980618f))
  545. .set_dtype(1, dtype::QuantizedS8(1.9980927f))
  546. .set_dtype(2, dtype::Float32())
  547. .set_dtype(3, dtype::Float32())
  548. .set_dtype(4, dtype::Float32())
  549. .set_rng(0, &int_rng)
  550. .set_rng(1, &int_rng)
  551. .set_rng(2, &float_rng)
  552. .set_rng(3, &float_rng)
  553. .set_param(param);
  554. auto opr = handle_cuda()->create_operator<ConvBias>();
  555. auto run = [&](const TensorShapeArray& shapes) {
  556. opr->param() = param;
  557. TensorLayout dst_layout;
  558. opr->deduce_layout({shapes[0], dtype::Float32()},
  559. {shapes[1], dtype::Float32()}, {}, {}, dst_layout);
  560. checker.execs({shapes[0], shapes[1], shapes[2], dst_layout, {}});
  561. };
  562. run({{1, 4, 4, 4, 4}, {4, 4, 3, 3, 4}, {1, 4, 1, 1}});
  563. run({{20, 1, 24, 24, 4}, {24, 1, 2, 2, 4}, {1, 24, 1, 1}});
  564. run({{20, 2, 24, 24, 4}, {24, 2, 3, 3, 4}, {1, 24, 1, 1}});
  565. param.sparse = ConvBias::Param::Sparse::GROUP;
  566. param.nonlineMode = ConvBias::Param::NonlineMode::RELU;
  567. checker.set_param(param);
  568. run({{1, 4, 24, 24, 4}, {4, 4, 1, 1, 1, 4}, {1, 16, 1, 1}});
  569. run({{20, 8, 24, 24, 4}, {4, 24, 2, 2, 2, 4}, {1, 96, 1, 1}});
  570. run({{1, 3, 24, 24, 4}, {3, 8, 1, 3, 3, 4}, {1, 24, 1, 1}});
  571. param.pad_h = param.pad_w = 1;
  572. param.stride_h = param.stride_w = 2;
  573. checker.set_param(param);
  574. run({{10, 16, 28, 28, 4}, {8, 8, 2, 3, 3, 4}, {1, 64, 1, 1}});
  575. // case which cudnn not supported
  576. param.sparse = ConvBias::Param::Sparse::DENSE;
  577. param.pad_h = param.pad_w = 1;
  578. param.stride_h = param.stride_w = 1;
  579. param.nonlineMode = ConvBias::Param::NonlineMode::H_SWISH;
  580. checker.set_param(param);
  581. checker.exec({{1, 4, 2, 2, 4}, {16, 4, 3, 3, 4}, {1, 16, 1, 1}, {}, {}});
  582. }
  583. #endif
  584. #endif
  585. TEST_F(CUDA, CONV_BIAS_FORWARD_CHANWISE) {
  586. Checker<ConvBiasForward> checker(handle_cuda());
  587. std::vector<TestArg> args = get_chanwise_args();
  588. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  589. ConvBiasForward::algo_name<ConvBias::DirectParam>("CHANNEL_WISE", {})
  590. .c_str()));
  591. for (auto dtype : std::vector<DType>{dtype::Float32(), dtype::Float16()}) {
  592. checker.set_dtype(0, dtype)
  593. .set_dtype(1, dtype)
  594. .set_dtype(2, dtype)
  595. .set_dtype(3, dtype)
  596. .set_dtype(4, dtype);
  597. if (dtype.enumv() == DTypeEnum::Float16)
  598. checker.set_epsilon(2e-2);
  599. for (auto&& arg : args) {
  600. checker.set_param(arg.param).execs({arg.src, arg.filter, arg.bias, {}, {}});
  601. }
  602. }
  603. }
  604. TEST_F(CUDA, CONV_BIAS_FORWARD_CHANWISE_SMALL) {
  605. Checker<ConvBiasForward> checker(handle_cuda());
  606. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  607. ConvBiasForward::algo_name<ConvBias::DirectParam>("CHANNEL_WISE_SMALL", {})
  608. .c_str()));
  609. param::ConvBias cur_param;
  610. using NLMode = param::ConvBias::NonlineMode;
  611. cur_param.mode = param::ConvBias::Mode::CROSS_CORRELATION;
  612. cur_param.sparse = ConvBias::Param::Sparse::GROUP;
  613. for (auto nlmode :
  614. {NLMode::IDENTITY, NLMode::RELU, NLMode::SIGMOID, NLMode::H_SWISH}) {
  615. cur_param.nonlineMode = nlmode;
  616. for (auto dtype : std::vector<DType> {
  617. dtype::Float32(),
  618. #if CUDA_VERSION >= 9000
  619. dtype::Float16()
  620. #endif
  621. }) {
  622. checker.set_dtype(0, dtype)
  623. .set_dtype(1, dtype)
  624. .set_dtype(2, dtype)
  625. .set_dtype(3, dtype)
  626. .set_dtype(4, dtype);
  627. if (dtype.enumv() == DTypeEnum::Float16)
  628. checker.set_epsilon(2e-2);
  629. for (uint32_t s : {1}) {
  630. for (uint32_t f : {1, 3, 5, 7}) {
  631. cur_param.pad_h = cur_param.pad_w = f / 2;
  632. cur_param.stride_h = cur_param.stride_w = s;
  633. checker.set_param(cur_param).execs(
  634. {{2, 3, 16, 16}, {3, 1, 1, f, f}, {1, 3, 1, 1}, {}, {}});
  635. }
  636. }
  637. cur_param.pad_h = cur_param.pad_w = 1;
  638. cur_param.stride_h = cur_param.stride_w = 1;
  639. checker.set_param(cur_param)
  640. .execs({{2, 3, 3, 16}, {3, 1, 1, 3, 3}, {1, 3, 1, 1}, {}, {}})
  641. .execs({{2, 3, 8, 3}, {3, 1, 1, 3, 3}, {1, 3, 1, 1}, {}, {}});
  642. }
  643. }
  644. }
  645. TEST_F(CUDA, CONV_BIAS_FORWARD_CHANWISE_8x8x32) {
  646. require_compute_capability(6, 1);
  647. Checker<ConvBiasForward> checker(handle_cuda());
  648. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  649. ConvBiasForward::algo_name<ConvBias::DirectParam>("CHANNEL_WISE_8X8X32", {})
  650. .c_str()));
  651. param::ConvBias cur_param;
  652. using NLMode = param::ConvBias::NonlineMode;
  653. cur_param.mode = param::ConvBias::Mode::CROSS_CORRELATION;
  654. cur_param.sparse = ConvBias::Param::Sparse::GROUP;
  655. cur_param.format = ConvBias::Param::Format::NHWC;
  656. UniformIntRNG rng(-4, 4);
  657. checker.set_dtype(0, dtype::Int8{})
  658. .set_dtype(1, dtype::Int8{})
  659. .set_dtype(2, dtype::Int32{})
  660. .set_dtype(4, dtype::Int32{})
  661. .set_rng(0, &rng)
  662. .set_rng(1, &rng)
  663. .set_rng(2, &rng);
  664. for (auto nlmode : {NLMode::IDENTITY, NLMode::RELU}) {
  665. cur_param.nonlineMode = nlmode;
  666. for (uint32_t s : {1, 2}) {
  667. for (uint32_t f : {1, 3, 5, 7}) {
  668. for (uint32_t g : {4, 8}) {
  669. cur_param.pad_h = cur_param.pad_w = f / 2;
  670. cur_param.stride_h = cur_param.stride_w = s;
  671. checker.set_param(cur_param).execs(
  672. {{2, 9, 16, g}, {g, 1, f, f, 1}, {1, 1, 1, g}, {}, {}});
  673. }
  674. }
  675. }
  676. }
  677. }
  678. TEST_F(CUDA, CONV_BIAS_FORWARD_CUDNN_CONVOLUTION) {
  679. using namespace conv_bias;
  680. std::vector<TestArg> args = get_args();
  681. Checker<ConvBiasForward> checker(handle_cuda());
  682. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  683. ConvBiasForward::algo_name<ConvBias::DefaultParam>("CUDNN:Convolution", {})
  684. .c_str()));
  685. NormalRNG default_rng;
  686. for (auto&& arg : args) {
  687. checker.set_dtype(0, dtype::Float32())
  688. .set_dtype(1, dtype::Float32())
  689. .set_dtype(2, dtype::Float32())
  690. .set_rng(0, &default_rng)
  691. .set_rng(1, &default_rng)
  692. .set_rng(2, &default_rng)
  693. .set_epsilon(1e-3)
  694. .set_param(arg.param)
  695. .execs({arg.src, arg.filter, arg.bias, {}, {}});
  696. }
  697. //! noncontiguous case
  698. {
  699. param::ConvBias param;
  700. param.pad_h = param.pad_w = 1;
  701. checker.set_param(param).execl(TensorLayoutArray{
  702. {{2, 16, 7, 7}, {1568, 49, 7, 1}, dtype::Float32()},
  703. {{16, 16, 3, 3}, {144, 9, 3, 1}, dtype::Float32()},
  704. {{}, {}, dtype::Float32()},
  705. {{}, {}, dtype::Float32()},
  706. {{2, 16, 7, 7}, {1568, 49, 7, 1}, dtype::Float32()},
  707. });
  708. }
  709. }
  710. TEST_F(CUDA, CONV_BIAS_FORWARD_INPLACE_MATMUL) {
  711. using namespace conv_bias;
  712. std::vector<TestArg> args = get_args();
  713. Checker<ConvBiasForward> checker(handle_cuda());
  714. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  715. ConvBiasForward::algo_name<ConvBias::MatmulParam>("INPLACE_MATMUL", {})
  716. .c_str()));
  717. param::ConvBias cur_param;
  718. using NLMode = param::ConvBias::NonlineMode;
  719. cur_param.mode = param::ConvBias::Mode::CROSS_CORRELATION;
  720. cur_param.sparse = ConvBias::Param::Sparse::DENSE;
  721. NormalRNG default_rng;
  722. checker.set_dtype(0, dtype::Float32())
  723. .set_dtype(1, dtype::Float32())
  724. .set_dtype(2, dtype::Float32())
  725. .set_rng(0, &default_rng)
  726. .set_rng(1, &default_rng)
  727. .set_rng(2, &default_rng)
  728. .set_epsilon(1e-3);
  729. for (auto nlmode :
  730. {NLMode::IDENTITY, NLMode::RELU, NLMode::SIGMOID, NLMode::H_SWISH}) {
  731. cur_param.nonlineMode = nlmode;
  732. for (uint32_t s : {1}) {
  733. for (uint32_t f : {1, 3, 5, 7}) {
  734. cur_param.pad_h = cur_param.pad_w = f / 2;
  735. cur_param.stride_h = cur_param.stride_w = s;
  736. checker.set_param(cur_param).execs(
  737. {{2, 4, 16, 16}, {4, 4, f, f}, {1, 4, 1, 1}, {}, {}});
  738. }
  739. }
  740. cur_param.pad_h = cur_param.pad_w = 1;
  741. cur_param.stride_h = cur_param.stride_w = 1;
  742. checker.set_param(cur_param)
  743. .execs({{2, 3, 3, 16}, {5, 3, 3, 3}, {1, 5, 1, 1}, {}, {}})
  744. .execs({{2, 2, 8, 3}, {3, 2, 3, 3}, {1, 3, 1, 1}, {}, {}});
  745. }
  746. //! noncontiguous case
  747. {
  748. param::ConvBias param;
  749. param.pad_h = param.pad_w = 1;
  750. checker.set_param(param).execl(TensorLayoutArray{
  751. {{2, 16, 7, 7}, {1568, 49, 7, 1}, dtype::Float32()},
  752. {{16, 16, 3, 3}, {144, 9, 3, 1}, dtype::Float32()},
  753. {{}, {}, dtype::Float32()},
  754. {{}, {}, dtype::Float32()},
  755. {{2, 16, 7, 7}, {1568, 49, 7, 1}, dtype::Float32()},
  756. });
  757. }
  758. }
  759. TEST_F(CUDA, CONV_BIAS_FORWARD_MATMUL) {
  760. using namespace conv_bias;
  761. std::vector<TestArg> args = get_args();
  762. Checker<ConvBiasForward> checker(handle_cuda());
  763. checker.set_before_exec_callback(
  764. AlgoChecker<ConvBiasForward>(ExecutionPolicyAlgoName{
  765. ConvBiasForward::algo_name<ConvBiasForward::MatmulParam>(
  766. "MATMUL", {})
  767. .c_str(),
  768. {{"CUBLAS", {}}}}));
  769. param::ConvBias cur_param;
  770. using NLMode = param::ConvBias::NonlineMode;
  771. cur_param.mode = param::ConvBias::Mode::CROSS_CORRELATION;
  772. cur_param.sparse = ConvBias::Param::Sparse::DENSE;
  773. NormalRNG default_rng;
  774. checker.set_dtype(0, dtype::Float32())
  775. .set_dtype(1, dtype::Float32())
  776. .set_dtype(2, dtype::Float32())
  777. .set_rng(0, &default_rng)
  778. .set_rng(1, &default_rng)
  779. .set_rng(2, &default_rng)
  780. .set_epsilon(1e-3);
  781. for (auto nlmode :
  782. {NLMode::IDENTITY, NLMode::RELU, NLMode::SIGMOID, NLMode::H_SWISH}) {
  783. cur_param.nonlineMode = nlmode;
  784. for (uint32_t s : {1}) {
  785. for (uint32_t f : {1, 3, 5, 7}) {
  786. cur_param.pad_h = cur_param.pad_w = f / 2;
  787. cur_param.stride_h = cur_param.stride_w = s;
  788. checker.set_param(cur_param).execs(
  789. {{2, 4, 16, 16}, {4, 4, f, f}, {1, 4, 1, 1}, {}, {}});
  790. }
  791. }
  792. cur_param.pad_h = cur_param.pad_w = 0;
  793. cur_param.stride_h = cur_param.stride_w = 1;
  794. checker.set_param(cur_param)
  795. .execs({{2, 3, 3, 16}, {5, 3, 3, 3}, {1, 5, 1, 1}, {}, {}})
  796. .execs({{2, 2, 8, 3}, {3, 2, 3, 3}, {1, 3, 1, 1}, {}, {}});
  797. }
  798. //! noncontiguous case
  799. {
  800. param::ConvBias param;
  801. param.pad_h = param.pad_w = 1;
  802. checker.set_param(param).execl(TensorLayoutArray{
  803. {{2, 16, 7, 7}, {1568, 49, 7, 1}, dtype::Float32()},
  804. {{16, 16, 3, 3}, {144, 9, 3, 1}, dtype::Float32()},
  805. {{}, {}, dtype::Float32()},
  806. {{}, {}, dtype::Float32()},
  807. {{2, 16, 7, 7}, {1568, 49, 7, 1}, dtype::Float32()},
  808. });
  809. }
  810. }
  811. TEST_F(CUDA, CONV_BIAS_FORWARD_MATMUL_8x8x32) {
  812. require_compute_capability(6, 1);
  813. Checker<ConvBiasForward> checker(handle_cuda());
  814. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  815. ConvBiasForward::algo_name<ConvBiasForward::MatmulParam>("MATMUL8X8X32", {})
  816. .c_str()));
  817. param::ConvBias cur_param;
  818. using NLMode = param::ConvBias::NonlineMode;
  819. cur_param.mode = param::ConvBias::Mode::CROSS_CORRELATION;
  820. cur_param.sparse = ConvBias::Param::Sparse::DENSE;
  821. cur_param.format = param::ConvBias::Format::NHWC;
  822. UniformIntRNG rng{-100, 100};
  823. UniformIntRNG bias_rng{-1000, 1000};
  824. checker.set_rng(0, &rng)
  825. .set_rng(1, &rng)
  826. .set_rng(2, &bias_rng)
  827. .set_rng(3, &rng)
  828. .set_dtype(0, dtype::QuantizedS8{1.2f})
  829. .set_dtype(1, dtype::QuantizedS8{1.3f})
  830. .set_dtype(2, dtype::QuantizedS32{1.2f * 1.3f})
  831. .set_dtype(3, dtype::QuantizedS8{1.1f})
  832. .set_dtype(4, dtype::QuantizedS8{1.0f})
  833. .set_epsilon(1);
  834. for (auto nlmode : {NLMode::IDENTITY, NLMode::RELU}) {
  835. cur_param.nonlineMode = nlmode;
  836. for (uint32_t s : {1}) {
  837. for (uint32_t f : {1, 3, 5, 7}) {
  838. cur_param.pad_h = cur_param.pad_w = f / 2;
  839. cur_param.stride_h = cur_param.stride_w = s;
  840. checker.set_param(cur_param).execs(
  841. {{2, 16, 16, 4}, {4, f, f, 4}, {1, 1, 1, 4}, {}, {}});
  842. }
  843. }
  844. cur_param.pad_h = cur_param.pad_w = 0;
  845. cur_param.stride_h = cur_param.stride_w = 1;
  846. checker.set_param(cur_param)
  847. .execs({{2, 3, 16, 3}, {5, 3, 3, 3}, {1, 1, 1, 5}, {}, {}})
  848. .execs({{2, 8, 3, 2}, {3, 3, 3, 2}, {1, 1, 1, 3}, {}, {}});
  849. }
  850. //! noncontiguous case
  851. {
  852. param::ConvBias param;
  853. param.pad_h = param.pad_w = 1;
  854. param.format = param::ConvBias::Format::NHWC;
  855. checker.set_param(param).execl(TensorLayoutArray{
  856. {{2, 7, 7, 16}, {1568, 224, 32, 1}, dtype::QuantizedS8{1.2f}},
  857. {{16, 3, 3, 16}, {144, 48, 16, 1}, dtype::QuantizedS8{1.3f}},
  858. {{}, {}, dtype::QuantizedS32{1.2f * 1.3f}},
  859. {{}, {}, dtype::QuantizedS8{1.1f}},
  860. {{2, 7, 7, 16}, {1568, 224, 32, 1}, dtype::QuantizedS32{1.2f * 1.3f}},
  861. });
  862. }
  863. }
  864. TEST_F(CUDA, CONV_BIAS_FORWARD_MATMUL_NCHW4) {
  865. require_compute_capability(6, 1);
  866. Checker<ConvBiasForward> checker(handle_cuda());
  867. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  868. ConvBiasForward::algo_name<ConvBiasForward::MatmulParam>("MATMUL8X8X32", {})
  869. .c_str()));
  870. UniformIntRNG int_rng{-127, 127};
  871. ConvBias::Param param;
  872. param.format = ConvBias::Param::Format::NCHW4;
  873. using NLMode = ConvBias::Param::NonlineMode;
  874. checker.set_dtype(0, dtype::QuantizedS8(0.5f))
  875. .set_dtype(1, dtype::QuantizedS8(0.5f))
  876. .set_dtype(2, dtype::QuantizedS32(0.25f))
  877. .set_dtype(4, dtype::QuantizedS8(0.35f))
  878. .set_rng(0, &int_rng)
  879. .set_rng(1, &int_rng)
  880. .set_rng(2, &int_rng);
  881. param.sparse = Convolution::Param::Sparse::DENSE;
  882. param.nonlineMode = NLMode::IDENTITY;
  883. param.pad_h = param.pad_w = 1;
  884. param.stride_h = param.stride_w = 1;
  885. checker.set_param(param);
  886. checker.exec({{8, 4, 10, 10, 4}, {16, 4, 3, 3, 4}, {1, 4, 1, 1, 4}, {}, {}});
  887. checker.exec({{1, 4, 2, 2, 4}, {16, 4, 3, 3, 4}, {1, 4, 1, 1, 4}, {}, {}});
  888. checker.exec({{8, 64, 12, 12, 4}, {256, 64, 3, 3, 4}, {1, 64, 1, 1, 4}, {}, {}});
  889. //! noncontiguous case
  890. {
  891. param::ConvBias param;
  892. param.pad_h = param.pad_w = 1;
  893. param.format = ConvBias::Param::Format::NCHW4;
  894. checker.set_param(param).execl(TensorLayoutArray{
  895. {{2, 4, 7, 7, 4}, {1568, 196, 28, 4, 1}, dtype::QuantizedS8{1.2f}},
  896. {{16, 4, 3, 3, 4}, {144, 36, 12, 4, 1}, dtype::QuantizedS8{1.3f}},
  897. {{}, {}, dtype::QuantizedS32{1.2f * 1.3f}},
  898. {{}, {}, dtype::QuantizedS8{1.1f}},
  899. {{2, 4, 7, 7, 4},
  900. {1568, 196, 28, 4, 1},
  901. dtype::QuantizedS32{1.2f * 1.3f}},
  902. });
  903. }
  904. }
  905. TEST_F(CUDA, CONV_BIAS_FORWARD_BATCHED_MATMUL) {
  906. using namespace conv_bias;
  907. std::vector<TestArg> args = get_args_1x1();
  908. Checker<ConvBiasForward> checker(handle_cuda());
  909. NormalRNG default_rng;
  910. checker.set_dtype(0, dtype::Float32())
  911. .set_dtype(1, dtype::Float32())
  912. .set_dtype(2, dtype::Float32())
  913. .set_rng(0, &default_rng)
  914. .set_rng(1, &default_rng)
  915. .set_rng(2, &default_rng)
  916. .set_epsilon(1e-3);
  917. checker.set_before_exec_callback(
  918. AlgoChecker<ConvBiasForward>(ExecutionPolicyAlgoName{
  919. ConvBiasForward::algo_name<ConvBiasForward::MatmulParam>(
  920. "BATCHED_MATMUL", {})
  921. .c_str(),
  922. {{"CUBLAS", {}}}}));
  923. for (auto&& arg : args) {
  924. checker.set_param(arg.param);
  925. checker.execs({arg.src, arg.filter, arg.bias, {}, {}});
  926. }
  927. //! noncontiguous case
  928. {
  929. param::ConvBias param;
  930. checker.set_param(param).execl(TensorLayoutArray{
  931. {{2, 16, 7, 7}, {1568, 49, 7, 1}, dtype::Float32()},
  932. {{16, 16, 1, 1}, {16, 1, 1, 1}, dtype::Float32()},
  933. {{}, {}, dtype::Float32()},
  934. {{}, {}, dtype::Float32()},
  935. {{2, 16, 7, 7}, {784, 49, 7, 1}, dtype::Float32()},
  936. });
  937. }
  938. }
  939. TEST_F(CUDA, CONV_BIAS_FORWARD_GROUP) {
  940. using NLMode = ConvBias::Param::NonlineMode;
  941. bool is_int_available = false;
  942. if (megdnn::test::check_compute_capability(6, 1)) {
  943. is_int_available = true;
  944. } else {
  945. is_int_available = false;
  946. }
  947. auto run = [&](size_t N, size_t IC, size_t IH, size_t IW, size_t FH, size_t FW,
  948. size_t OC, size_t PH, size_t PW, size_t SH, size_t SW, size_t DH,
  949. size_t DW, size_t group, NLMode mode) {
  950. {
  951. // float case
  952. Checker<ConvBiasForward> checker(handle_cuda());
  953. checker.set_before_exec_callback(
  954. conv_bias::ConvBiasAlgoChecker<ConvBias>(ExecutionPolicyAlgoName{
  955. ConvBiasForward::algo_name<ConvBiasForward::DirectParam>(
  956. "CUDA:GROUP_CONV", {})
  957. .c_str(),
  958. {{"CUDNN", {}}}}));
  959. ConvBias::Param param;
  960. param.sparse = ConvBias::Param::Sparse::GROUP;
  961. param.nonlineMode = mode;
  962. param.pad_h = PH;
  963. param.pad_w = PW;
  964. param.stride_h = SH;
  965. param.stride_w = SW;
  966. param.dilate_h = DH;
  967. param.dilate_w = DW;
  968. auto ICg = IC / group;
  969. auto OCg = OC / group;
  970. checker.set_param(param).exec(
  971. {{N, IC, IH, IW},
  972. {group, OCg, ICg, FH, FW},
  973. {1, OCg * group, 1, 1},
  974. {},
  975. {}});
  976. }
  977. if (is_int_available) {
  978. // int 8x8x32 case
  979. Checker<ConvBiasForward> checker(handle_cuda());
  980. ConvBias::Param param;
  981. param.sparse = Convolution::Param::Sparse::GROUP;
  982. param.format = Convolution::Param::Format::NHWC;
  983. param.nonlineMode = NLMode::IDENTITY;
  984. param.pad_h = PH;
  985. param.pad_w = PW;
  986. param.stride_h = SH;
  987. param.stride_w = SW;
  988. param.dilate_h = DH;
  989. param.dilate_w = DW;
  990. auto ICg = IC / group;
  991. auto OCg = OC / group;
  992. UniformIntRNG rng(-4, 4);
  993. checker.set_param(param)
  994. .set_dtype(0, dtype::QuantizedS8(0.5f))
  995. .set_dtype(1, dtype::QuantizedS8(0.5f))
  996. .set_dtype(2, dtype::QuantizedS32(0.25f))
  997. .set_dtype(3, dtype::QuantizedS8(0.13f))
  998. .set_dtype(4, dtype::QuantizedS8(0.35f))
  999. .set_rng(0, &rng)
  1000. .set_rng(1, &rng)
  1001. .set_rng(2, &rng)
  1002. .exec({{N, IH, IW, IC},
  1003. {group, OCg, FH, FW, ICg},
  1004. {1, 1, 1, OCg * group},
  1005. {},
  1006. {}});
  1007. }
  1008. };
  1009. for (NLMode nlmode :
  1010. {NLMode::IDENTITY, NLMode::RELU, NLMode::SIGMOID, NLMode::H_SWISH}) {
  1011. // normal case
  1012. run(2, 64, 7, 7, 3, 3, 32, 0, 0, 1, 1, 1, 1, 2, nlmode);
  1013. // padded case
  1014. run(2, 32, 7, 7, 3, 3, 64, 1, 1, 1, 1, 1, 1, 4, nlmode);
  1015. // strided case
  1016. run(2, 32, 7, 7, 3, 3, 64, 0, 0, 2, 2, 1, 1, 8, nlmode);
  1017. // dilated case
  1018. run(2, 32, 7, 7, 3, 3, 64, 0, 0, 1, 1, 2, 2, 8, nlmode);
  1019. }
  1020. }
  1021. #if CUDA_VERSION >= 10000
  1022. TEST_F(CUDA, CONV_BIAS_FORWARD_NCHW8_PART_1) {
  1023. test_conv_bias_forward_wmma_int4_nchw8(handle_cuda(), 3);
  1024. }
  1025. TEST_F(CUDA, CONV_BIAS_FORWARD_NCHW8_PART_2) {
  1026. test_conv_bias_forward_wmma_int4_nchw8(handle_cuda(), 5);
  1027. }
  1028. TEST_F(CUDA, CONV_BIAS_FORWARD_NCHW8_PART_3) {
  1029. test_conv_bias_forward_wmma_int4_nchw8(handle_cuda(), 7);
  1030. }
  1031. #if MEGDNN_WITH_BENCHMARK
  1032. TEST_F(CUDA, BENCHMARK_CONV_BIAS_QUANTIZED4x4x32) {
  1033. require_compute_capability(7, 5);
  1034. Benchmarker<ConvBiasForward> bencher(handle_cuda());
  1035. UniformIntRNG int_rng{0, 8};
  1036. ConvBias::Param param;
  1037. param.format = ConvBias::Param::Format::NCHW8;
  1038. param.stride_h = param.stride_w = 1;
  1039. using NonlineMode = ConvBias::Param::NonlineMode;
  1040. param.nonlineMode = NonlineMode::RELU;
  1041. auto run_bench = [&](size_t batch, size_t ci, size_t hi, size_t wi, size_t co,
  1042. size_t fh, size_t fw, size_t nr_times) {
  1043. param.pad_h = fh / 2;
  1044. param.pad_w = fw / 2;
  1045. bencher.set_param(param)
  1046. .set_dtype(0, dtype::Quantized4Asymm(1.3f, (uint8_t)(1)))
  1047. .set_dtype(1, dtype::Quantized4Asymm(1.3f, (uint8_t)(2)))
  1048. .set_dtype(2, dtype::QuantizedS32(1.3f * 1.3f))
  1049. .set_dtype(4, dtype::QuantizedS32(1.3f * 1.3f))
  1050. .set_rng(0, &int_rng)
  1051. .set_rng(1, &int_rng)
  1052. .set_rng(2, &int_rng);
  1053. bencher.set_times(nr_times);
  1054. size_t ho = infer_conv_shape(hi, fh, 1, param.pad_h);
  1055. size_t wo = infer_conv_shape(wi, fw, 1, param.pad_w);
  1056. TensorShape inp{batch, ci / 8, hi, wi, 8}, kern{co, ci / 8, fh, fw, 8},
  1057. out{batch, co / 8, ho, wo, 8};
  1058. auto time_in_ms =
  1059. bencher.execs({inp, kern, {1, co / 8, 1, 1, 8}, {}, out}) / nr_times;
  1060. auto ops =
  1061. 2.0 * batch * co * ho * wo * ci * fh * fw / (time_in_ms * 1e-3) * 1e-12;
  1062. printf("inp=%s, kern=%s, out=%s, time: %.2fms, perf: %.2f Tops\n",
  1063. inp.to_string().c_str(), kern.to_string().c_str(),
  1064. out.to_string().c_str(), time_in_ms, ops);
  1065. };
  1066. run_bench(256, 256, 16, 16, 256, 3, 3, 1000);
  1067. run_bench(1, 32, 224, 224, 64, 7, 7, 1000);
  1068. run_bench(1, 8192, 64, 64, 4096, 3, 3, 1000);
  1069. run_bench(1, 256, 64, 64, 256, 3, 3, 1000);
  1070. run_bench(1, 64, 128, 128, 64, 3, 3, 1000);
  1071. run_bench(1, 512, 32, 32, 512, 3, 3, 1000);
  1072. run_bench(1, 1024, 16, 16, 1024, 3, 3, 1000);
  1073. run_bench(1, 64, 56, 56, 64, 3, 3, 1000);
  1074. run_bench(1, 128, 32, 32, 128, 3, 3, 1000);
  1075. run_bench(1, 256, 16, 16, 256, 3, 3, 1000);
  1076. run_bench(1, 512, 8, 8, 512, 3, 3, 1000);
  1077. run_bench(32, 32, 224, 224, 64, 7, 7, 1000);
  1078. run_bench(32, 64, 56, 56, 64, 3, 3, 1000);
  1079. run_bench(32, 128, 32, 32, 128, 3, 3, 1000);
  1080. run_bench(32, 256, 16, 16, 256, 3, 3, 1000);
  1081. run_bench(32, 512, 8, 8, 512, 3, 3, 1000);
  1082. run_bench(256, 32, 224, 224, 64, 7, 7, 1000);
  1083. run_bench(256, 64, 56, 56, 64, 3, 3, 1000);
  1084. run_bench(256, 128, 32, 32, 128, 3, 3, 1000);
  1085. run_bench(256, 256, 16, 16, 256, 3, 3, 1000);
  1086. run_bench(256, 512, 8, 8, 512, 3, 3, 1000);
  1087. }
  1088. #endif
  1089. #endif
  1090. TEST_F(CUDA, CONV_BIAS_FORWARD_DILATED) {
  1091. require_compute_capability(6, 0);
  1092. auto run = [&](size_t N, size_t IC, size_t IH, size_t IW, size_t FH, size_t FW,
  1093. size_t OC, size_t PH, size_t PW, size_t SH, size_t SW, size_t DH,
  1094. size_t DW) {
  1095. {
  1096. // float case
  1097. Checker<ConvBiasForward> checker(handle_cuda());
  1098. ConvBias::Param param;
  1099. param.sparse = ConvBias::Param::Sparse::DENSE;
  1100. param.pad_h = PH;
  1101. param.pad_w = PW;
  1102. param.stride_h = SH;
  1103. param.stride_w = SW;
  1104. param.dilate_h = DH;
  1105. param.dilate_w = DW;
  1106. param.nonlineMode = ConvBias::Param::NonlineMode::IDENTITY;
  1107. checker.set_param(param).exec(
  1108. {{N, IC, IH, IW}, {OC, IC, FH, FW}, {1, OC, 1, 1}, {}, {}});
  1109. }
  1110. };
  1111. // dilated case
  1112. run(2, 8, 7, 7, 3, 3, 4, 0, 0, 1, 1, 2, 2);
  1113. }
  1114. #if CUDNN_VERSION >= 7500
  1115. TEST_F(CUDA, CONV_BIAS_FORWARD_TENSORCORE_INT8) {
  1116. require_compute_capability(7, 5);
  1117. using namespace conv_bias;
  1118. Checker<ConvBiasForward> checker(handle_cuda());
  1119. auto opr = handle_cuda()->create_operator<ConvBias>();
  1120. auto i8_min = std::numeric_limits<int8_t>().min();
  1121. auto i8_max = std::numeric_limits<int8_t>().max();
  1122. UniformIntRNG int_rng{i8_min, i8_max};
  1123. ConvBias::Param param;
  1124. param.format = ConvBias::Param::Format::NCHW32;
  1125. using NonlineMode = ConvBias::Param::NonlineMode;
  1126. for (NonlineMode mode : {NonlineMode::IDENTITY, NonlineMode::RELU}) {
  1127. for (size_t batch : {2}) {
  1128. for (size_t ic : {64, 32}) {
  1129. for (size_t oc : {32}) {
  1130. for (size_t fh : {3, 5, 7}) {
  1131. for (int ph : {static_cast<int>(fh / 2), 0}) {
  1132. for (int sh : {1, 2}) {
  1133. for (size_t ih : {9, 11, 12, 13, 16}) {
  1134. for (size_t iw : {8, 27, 32, 40}) {
  1135. param.nonlineMode = mode;
  1136. param.stride_h = param.stride_w = sh;
  1137. param.pad_h = param.pad_w = ph;
  1138. opr->param() = param;
  1139. TensorLayout dst_layout;
  1140. opr->deduce_layout(
  1141. {{batch, ic / 32, ih, iw, 32},
  1142. dtype::Float32()},
  1143. {{oc, ic / 32, fh, fh, 32},
  1144. dtype::Float32()},
  1145. {}, {}, dst_layout);
  1146. checker.set_dtype(0, dtype::QuantizedS8(1.3f))
  1147. .set_dtype(1, dtype::QuantizedS8(1.3f))
  1148. .set_dtype(
  1149. 2, dtype::QuantizedS32(
  1150. 1.3f * 1.3f))
  1151. .set_dtype(3, dtype::QuantizedS8(1.7f))
  1152. .set_dtype(
  1153. 4,
  1154. dtype::QuantizedS8(1.2f * 1.2f))
  1155. .set_rng(0, &int_rng)
  1156. .set_rng(1, &int_rng)
  1157. .set_rng(2, &int_rng)
  1158. .set_rng(3, &int_rng)
  1159. .set_epsilon(1 + 1e-3)
  1160. .set_param(param)
  1161. .execs({{batch, ic / 32, ih, iw, 32},
  1162. {oc, ic / 32, fh, fh, 32},
  1163. {1, oc / 32, 1, 1, 32},
  1164. dst_layout,
  1165. {}});
  1166. }
  1167. }
  1168. }
  1169. }
  1170. }
  1171. }
  1172. }
  1173. }
  1174. }
  1175. }
  1176. #if MEGDNN_WITH_BENCHMARK
  1177. TEST_F(CUDA, BENCHMARK_CONV_BIAS_FORWARD_TENSORCORE_INT8) {
  1178. require_compute_capability(7, 5);
  1179. Benchmarker<ConvBiasForward> bencher(handle_cuda());
  1180. bencher.set_display(false);
  1181. ConvBias::Param param;
  1182. param.format = ConvBias::Param::Format::NCHW32;
  1183. ConvBias::Param param_without_tensorcore;
  1184. param_without_tensorcore.format = ConvBias::Param::Format::NCHW4;
  1185. auto i8_min = std::numeric_limits<int8_t>().min();
  1186. auto i8_max = std::numeric_limits<int8_t>().max();
  1187. UniformIntRNG int_rng{i8_min, i8_max};
  1188. using NonlineMode = ConvBias::Param::NonlineMode;
  1189. param.nonlineMode = NonlineMode::IDENTITY;
  1190. auto run_bench = [&](size_t batch, size_t ci, size_t hi, size_t wi, size_t co,
  1191. size_t fh, size_t fw, size_t sh, size_t sw, size_t nr_times) {
  1192. param.pad_h = fh / 2;
  1193. param.pad_w = fw / 2;
  1194. param.stride_h = sh;
  1195. param.stride_w = sw;
  1196. param_without_tensorcore.pad_h = fh / 2;
  1197. param_without_tensorcore.pad_w = fw / 2;
  1198. param_without_tensorcore.stride_h = sh;
  1199. param_without_tensorcore.stride_w = sw;
  1200. bencher.set_param(param)
  1201. .set_dtype(0, dtype::QuantizedS8(1.3f))
  1202. .set_dtype(1, dtype::QuantizedS8(1.3f))
  1203. .set_dtype(2, dtype::QuantizedS32(1.3f * 1.3f))
  1204. .set_dtype(4, dtype::QuantizedS8(1.2f))
  1205. .set_rng(0, &int_rng)
  1206. .set_rng(1, &int_rng)
  1207. .set_rng(2, &int_rng);
  1208. bencher.set_times(nr_times);
  1209. size_t ho = infer_conv_shape(hi, fh, sh, param.pad_h);
  1210. size_t wo = infer_conv_shape(wi, fw, sw, param.pad_w);
  1211. TensorShape inp{batch, ci / 32, hi, wi, 32}, kern{co, ci / 32, fh, fw, 32},
  1212. out{batch, co / 32, ho, wo, 32};
  1213. auto time_in_ms =
  1214. bencher.execs({inp, kern, {1, co / 32, 1, 1, 32}, {}, out}) / nr_times;
  1215. auto ops =
  1216. 2.0 * batch * co * ho * wo * ci * fh * fw / (time_in_ms * 1e-3) * 1e-12;
  1217. printf("inp=%s, kern=%s, out=%s, time: %.2fms, perf: %.2f Tops "
  1218. "(TensorCore)",
  1219. inp.to_string().c_str(), kern.to_string().c_str(),
  1220. out.to_string().c_str(), time_in_ms, ops);
  1221. decltype(ops) ops_without_tensorcore;
  1222. bencher.set_param(param_without_tensorcore);
  1223. {
  1224. TensorShape inp{batch, ci / 4, hi, wi, 4}, kern{co, ci / 4, fh, fw, 4},
  1225. out{batch, co / 4, ho, wo, 4};
  1226. auto time_in_ms =
  1227. bencher.execs({inp, kern, {1, co / 4, 1, 1, 4}, {}, out}) /
  1228. nr_times;
  1229. ops_without_tensorcore = 2.0 * batch * co * ho * wo * ci * fh * fw /
  1230. (time_in_ms * 1e-3) * 1e-12;
  1231. printf(", time: %.2fms perf: %.2f Tops (without TensorCore) ", time_in_ms,
  1232. ops_without_tensorcore);
  1233. }
  1234. printf("speedup: %.2fx\n", ops / ops_without_tensorcore);
  1235. };
  1236. // resnet-50
  1237. // bottleneck-1
  1238. // proj
  1239. run_bench(1, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1240. run_bench(1, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  1241. run_bench(1, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  1242. run_bench(1, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1243. // bottleneck-2
  1244. // proj
  1245. run_bench(1, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  1246. run_bench(1, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  1247. run_bench(1, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  1248. run_bench(1, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  1249. // bottleneck-3
  1250. // proj
  1251. run_bench(1, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  1252. run_bench(1, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  1253. run_bench(1, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  1254. run_bench(1, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  1255. // bottleneck-4
  1256. // proj
  1257. run_bench(1, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  1258. run_bench(1, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  1259. run_bench(1, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  1260. run_bench(1, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  1261. run_bench(32, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1262. run_bench(32, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  1263. run_bench(32, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  1264. run_bench(32, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1265. run_bench(32, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  1266. run_bench(32, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  1267. run_bench(32, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  1268. run_bench(32, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  1269. run_bench(32, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  1270. run_bench(32, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  1271. run_bench(32, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  1272. run_bench(32, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  1273. run_bench(32, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  1274. run_bench(32, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  1275. run_bench(32, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  1276. run_bench(32, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  1277. run_bench(256, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1278. run_bench(256, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  1279. run_bench(256, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  1280. run_bench(256, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1281. run_bench(256, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  1282. run_bench(256, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  1283. run_bench(256, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  1284. run_bench(256, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  1285. run_bench(256, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  1286. run_bench(256, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  1287. run_bench(256, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  1288. run_bench(256, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  1289. run_bench(256, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  1290. run_bench(256, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  1291. run_bench(256, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  1292. run_bench(256, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  1293. }
  1294. #endif
  1295. #endif
  1296. // vim: syntax=cpp.doxygen

MegEngine 安装包中集成了使用 GPU 运行代码所需的 CUDA 环境,不用区分 CPU 和 GPU 版。 如果想要运行 GPU 程序,请确保机器本身配有 GPU 硬件设备并安装好驱动。 如果你想体验在云端 GPU 算力平台进行深度学习开发的感觉,欢迎访问 MegStudio 平台