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conv_bias.cpp 53 kB

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  1. /**
  2. * \file dnn/test/cuda/conv_bias.cpp
  3. * MegEngine is Licensed under the Apache License, Version 2.0 (the "License")
  4. *
  5. * Copyright (c) 2014-2021 Megvii Inc. All rights reserved.
  6. *
  7. * Unless required by applicable law or agreed to in writing,
  8. * software distributed under the License is distributed on an
  9. * "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  10. */
  11. #include "megdnn/dtype.h"
  12. #include "test/cuda/fixture.h"
  13. #include "megdnn/opr_param_defs.h"
  14. #include "megdnn/oprs.h"
  15. #include "src/cuda/handle.h"
  16. #include "test/common/benchmarker.h"
  17. #include "test/common/checker.h"
  18. #include "test/common/conv_bias.h"
  19. #include "test/common/rng.h"
  20. #include "test/common/tensor.h"
  21. #include "test/common/workspace_wrapper.h"
  22. #include "test/cuda/utils.h"
  23. using namespace megdnn;
  24. using namespace test;
  25. using namespace conv_bias;
  26. namespace {
  27. #if CUDA_VERSION >= 10000
  28. void test_conv_bias_forward_wmma_int4_nchw8(Handle* handle_cuda, size_t fh) {
  29. require_compute_capability(7, 5);
  30. using namespace conv_bias;
  31. Checker<ConvBiasForward> checker(handle_cuda);
  32. UniformIntRNG int_rng{0, 8};
  33. ConvBias::Param param;
  34. param.format = ConvBias::Param::Format::NCHW8;
  35. using NonlineMode = ConvBias::Param::NonlineMode;
  36. for (NonlineMode mode : {NonlineMode::RELU}) {
  37. for (size_t batch : {1}) {
  38. for (size_t ic : {128, 32}) {
  39. for (size_t oc : {32}) {
  40. for (int ph : {static_cast<int>(fh / 2), 0}) {
  41. for (size_t ih : {8, 9, 13, 15, 16}) {
  42. for (size_t iw : {8, 16, 24, 32, 40}) {
  43. param.nonlineMode = mode;
  44. param.stride_h = param.stride_w = 1;
  45. param.pad_h = param.pad_w = ph;
  46. checker.set_dtype(0,
  47. dtype::Quantized4Asymm(
  48. 1.3f, (uint8_t)(1)))
  49. .set_dtype(1,
  50. dtype::Quantized4Asymm(
  51. 1.3f, (uint8_t)(2)))
  52. .set_dtype(2, dtype::QuantizedS32(1.3f *
  53. 1.3f))
  54. .set_dtype(4, dtype::QuantizedS32(1.3f *
  55. 1.3f))
  56. .set_rng(0, &int_rng)
  57. .set_rng(1, &int_rng)
  58. .set_rng(2, &int_rng)
  59. .set_param(param);
  60. if (!ph)
  61. iw += 2 * (fh / 2);
  62. size_t oh = infer_conv_shape(ih, fh, 1, ph);
  63. size_t ow = infer_conv_shape(iw, fh, 1, ph);
  64. if (ow % 8 != 0)
  65. continue;
  66. checker.execs({{batch, ic / 8, ih, iw, 8},
  67. {oc, ic / 8, fh, fh, 8},
  68. {1, oc / 8, 1, 1, 8},
  69. {},
  70. {}});
  71. checker.execs({{batch, ic / 8, ih, iw, 8},
  72. {oc, ic / 8, fh, fh, 8},
  73. {batch, oc / 8, oh, ow, 8},
  74. {},
  75. {}});
  76. }
  77. }
  78. }
  79. }
  80. }
  81. }
  82. }
  83. }
  84. #endif
  85. } // namespace
  86. #if CUDNN_VERSION >= 7400
  87. TEST_F(CUDA, CONV_BIAS_FORWARD_F32) {
  88. using namespace conv_bias;
  89. std::vector<TestArg> args = get_args();
  90. Checker<ConvBiasForward> checker(handle_cuda());
  91. NormalRNG default_rng;
  92. for (auto&& arg : args) {
  93. checker.set_dtype(0, dtype::Float32())
  94. .set_dtype(1, dtype::Float32())
  95. .set_dtype(2, dtype::Float32())
  96. .set_rng(0, &default_rng)
  97. .set_rng(1, &default_rng)
  98. .set_rng(2, &default_rng)
  99. .set_epsilon(1e-3)
  100. .set_param(arg.param)
  101. .execs({arg.src, arg.filter, arg.bias, {}, {}});
  102. }
  103. }
  104. TEST_F(CUDA, CONV_BIAS_FORWARD_BF16) {
  105. using namespace conv_bias;
  106. std::vector<TestArg> args = get_args();
  107. Checker<ConvBiasForward> checker(handle_cuda());
  108. checker.set_before_exec_callback(
  109. AlgoChecker<ConvBiasForward>(ExecutionPolicyAlgoName{
  110. "CONVBIAS_BFLOAT16", {{"MATMUL", {}}}}));
  111. NormalRNG default_rng;
  112. for (auto&& arg : args) {
  113. arg.param.compute_mode = param::Convolution::ComputeMode::FLOAT32;
  114. checker.set_dtype(0, dtype::BFloat16())
  115. .set_dtype(1, dtype::BFloat16())
  116. .set_dtype(2, dtype::BFloat16())
  117. .set_dtype(3, dtype::BFloat16())
  118. .set_dtype(4, dtype::BFloat16())
  119. .set_rng(0, &default_rng)
  120. .set_rng(1, &default_rng)
  121. .set_rng(2, &default_rng)
  122. .set_epsilon(2e-2)
  123. .set_param(arg.param)
  124. .execs({arg.src, arg.filter, arg.bias, {}, {}});
  125. }
  126. }
  127. TEST_F(CUDA, CONV_BIAS_FORWARD_QS8) {
  128. require_compute_capability(6, 1);
  129. UniformIntRNG int_rng{-50, 50};
  130. Checker<ConvBiasForward> checker(handle_cuda());
  131. ConvBias::Param param;
  132. param.format = ConvBias::Param::Format::NHWC;
  133. param.nonlineMode = ConvBias::Param::NonlineMode::IDENTITY;
  134. {
  135. auto src_shape = TensorShape{20, 224, 224, 4};
  136. auto filter_shape = TensorShape{24, 1, 1, 4};
  137. auto bias_shape = TensorShape{1, 1, 1, 24};
  138. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  139. .set_dtype(1, dtype::QuantizedS8(2.5f))
  140. .set_dtype(2, dtype::QuantizedS32(6.25f))
  141. .set_dtype(4, dtype::QuantizedS8(60.25f))
  142. .set_rng(0, &int_rng)
  143. .set_rng(1, &int_rng)
  144. .set_rng(2, &int_rng)
  145. .set_param(param)
  146. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  147. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  148. .set_dtype(1, dtype::QuantizedS8(2.5f))
  149. .set_dtype(2, dtype::QuantizedS32(6.25f))
  150. .set_dtype(4, dtype::QuantizedS8(40.25f))
  151. .set_rng(0, &int_rng)
  152. .set_rng(1, &int_rng)
  153. .set_rng(2, &int_rng)
  154. .set_param(param)
  155. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  156. }
  157. {
  158. auto src_shape = TensorShape{20, 224, 224, 4};
  159. auto filter_shape = TensorShape{24, 1, 1, 4};
  160. auto bias_shape = TensorShape{1, 1, 1, 24};
  161. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  162. .set_dtype(1, dtype::QuantizedS8(2.5f))
  163. .set_dtype(2, dtype::QuantizedS32(6.25f))
  164. .set_dtype(4, dtype::QuantizedS8(60.25f))
  165. .set_rng(0, &int_rng)
  166. .set_rng(1, &int_rng)
  167. .set_rng(2, &int_rng)
  168. .set_param(param)
  169. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  170. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  171. .set_dtype(1, dtype::QuantizedS8(2.5f))
  172. .set_dtype(2, dtype::QuantizedS32(6.25f))
  173. .set_dtype(4, dtype::QuantizedS8(40.25f))
  174. .set_rng(0, &int_rng)
  175. .set_rng(1, &int_rng)
  176. .set_rng(2, &int_rng)
  177. .set_param(param)
  178. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  179. }
  180. {
  181. param.sparse = ConvBias::Param::Sparse::GROUP;
  182. auto src_shape = TensorShape{20, 224, 224, 16};
  183. auto filter_shape = TensorShape{4, 4, 1, 1, 4};
  184. auto bias_shape = TensorShape{1, 1, 1, 16};
  185. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  186. .set_dtype(1, dtype::QuantizedS8(2.5f))
  187. .set_dtype(2, dtype::QuantizedS32(6.25f))
  188. .set_dtype(4, dtype::QuantizedS8(60.25f))
  189. .set_rng(0, &int_rng)
  190. .set_rng(1, &int_rng)
  191. .set_rng(2, &int_rng)
  192. .set_param(param)
  193. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  194. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  195. .set_dtype(1, dtype::QuantizedS8(2.5f))
  196. .set_dtype(2, dtype::QuantizedS32(6.25f))
  197. .set_dtype(4, dtype::QuantizedS8(40.25f))
  198. .set_rng(0, &int_rng)
  199. .set_rng(1, &int_rng)
  200. .set_rng(2, &int_rng)
  201. .set_param(param)
  202. .execs({src_shape, filter_shape, bias_shape, {}, {}});
  203. }
  204. }
  205. TEST_F(CUDA, CONV_BIAS_NCHW_QS8) {
  206. //! not support NonlineMode::SIGMOID and NonlineMode::H_SWISH
  207. require_compute_capability(6, 1);
  208. Checker<ConvBiasForward> checker(handle_cuda());
  209. UniformIntRNG int_rng{-128, 127};
  210. using NonlineMode = ConvBias::Param::NonlineMode;
  211. ConvBias::Param param;
  212. param.format = ConvBias::Param::Format::NCHW;
  213. checker.set_dtype(0, dtype::QuantizedS8(2.5f))
  214. .set_dtype(1, dtype::QuantizedS8(2.5f))
  215. .set_dtype(2, dtype::QuantizedS32(6.25f))
  216. .set_dtype(3, dtype::QuantizedS8(0.25f))
  217. .set_dtype(4, dtype::QuantizedS8(0.25f))
  218. .set_rng(0, &int_rng)
  219. .set_rng(1, &int_rng)
  220. .set_rng(2, &int_rng)
  221. .set_rng(3, &int_rng);
  222. for (NonlineMode mode : {NonlineMode::RELU,
  223. NonlineMode::IDENTITY, NonlineMode::H_SWISH}) {
  224. for (size_t g : {1, 2}) {
  225. for (size_t b : {2}) {
  226. for (size_t ic : {6, 16}) {
  227. for (size_t oc : {4}) {
  228. for (size_t fh : {1, 3}) {
  229. for (int ph : {static_cast<int>(fh / 2)}) {
  230. for (int sh : {1, 2}) {
  231. size_t ih = 16, iw = 16;
  232. param.nonlineMode = mode;
  233. param.stride_h = param.stride_w = sh;
  234. param.pad_h = param.pad_w = ph;
  235. param.sparse =
  236. ConvBias::Param::Sparse::DENSE;
  237. checker.set_param(param)
  238. .execs({{b, ic / 2, ih, iw},
  239. {oc, ic / 2, fh, fh},
  240. {1, oc, 1, 1},
  241. {},
  242. {}});
  243. param.sparse =
  244. ConvBias::Param::Sparse::GROUP;
  245. checker.set_param(param)
  246. .execs({{b, ic, ih, iw},
  247. {g, oc/g, ic/g, fh, fh},
  248. {1, oc, 1, 1},
  249. {},
  250. {}});
  251. }
  252. }
  253. }
  254. }
  255. }
  256. }
  257. }
  258. }
  259. }
  260. #if MEGDNN_WITH_BENCHMARK
  261. TEST_F(CUDA, BENCHMARK_CONV_BIAS_NCHW4_INT8) {
  262. require_compute_capability(6, 1);
  263. Benchmarker<ConvBiasForward> bencher(handle_cuda());
  264. bencher.set_display(false);
  265. ConvBias::Param param_nchw;
  266. param_nchw.format = ConvBias::Param::Format::NCHW;
  267. ConvBias::Param param_nchw4;
  268. param_nchw4.format = ConvBias::Param::Format::NCHW4;
  269. auto i8_min = std::numeric_limits<int8_t>().min();
  270. auto i8_max = std::numeric_limits<int8_t>().max();
  271. UniformIntRNG int_rng{i8_min, i8_max};
  272. param_nchw.nonlineMode = ConvBias::Param::NonlineMode::IDENTITY;
  273. auto run_bench = [&](size_t b, size_t ci, size_t hi, size_t wi,
  274. size_t co, size_t fh, size_t fw, size_t sh,
  275. size_t sw, size_t nr_times) {
  276. param_nchw.pad_h = fh / 2;
  277. param_nchw.pad_w = fw / 2;
  278. param_nchw.stride_h = sh;
  279. param_nchw.stride_w = sw;
  280. param_nchw4.pad_h = fh / 2;
  281. param_nchw4.pad_w = fh / 2;
  282. param_nchw4.stride_h = sh;
  283. param_nchw4.stride_w = sw;
  284. bencher.set_times(nr_times)
  285. .set_dtype(0, dtype::QuantizedS8(2.5f))
  286. .set_dtype(1, dtype::QuantizedS8(2.5f))
  287. .set_dtype(2, dtype::QuantizedS32(6.25f))
  288. .set_dtype(4, dtype::QuantizedS8(0.35f))
  289. .set_rng(0, &int_rng)
  290. .set_rng(1, &int_rng)
  291. .set_rng(2, &int_rng);
  292. bencher.set_param(param_nchw);
  293. size_t ho = infer_conv_shape(hi, fh, sh, param_nchw.pad_h);
  294. size_t wo = infer_conv_shape(wi, fw, sw, param_nchw.pad_w);
  295. TensorShape inp{b, ci, hi, wi}, kern{co, ci, fh, fw},
  296. out{b, co, ho, wo};
  297. auto time_in_ms = bencher.execs(
  298. {inp, kern, {1, co, 1, 1}, {}, out}) / nr_times;
  299. auto ops_nchw = 2.0 * b * co * ho * wo * ci * fh * fw /
  300. (time_in_ms * 1e-3) * 1e-12;
  301. printf("inp=%s, kern=%s, out=%s, time: %.2fms, perf: %.2f Tops "
  302. "(NCHW)\n",
  303. inp.to_string().c_str(), kern.to_string().c_str(),
  304. out.to_string().c_str(), time_in_ms, ops_nchw);
  305. bencher.set_param(param_nchw4);
  306. decltype(ops_nchw) ops_nchw4;
  307. {
  308. TensorShape inp{b, ci / 4, hi, wi, 4},
  309. kern{co, ci / 4, fh, fw, 4}, out{b, co / 4, ho, wo, 4};
  310. auto time_in_ms = bencher.execs(
  311. {inp, kern, {1, co / 4, 1, 1, 4}, {}, out}) / nr_times;
  312. ops_nchw4 = 2.0 * b * co * ho * wo * ci * fh * fw /
  313. (time_in_ms * 1e-3) * 1e-12;
  314. printf("inp=%s, kern=%s, out=%s, time: %.2fms, perf: %.2f Tops "
  315. "(NCHW4)\n",
  316. inp.to_string().c_str(), kern.to_string().c_str(),
  317. out.to_string().c_str(), time_in_ms, ops_nchw4);
  318. }
  319. printf("speedup: %.2fx\n", ops_nchw4 / ops_nchw);
  320. };
  321. // resnet-50
  322. // bottleneck-1
  323. // proj
  324. run_bench(1, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  325. run_bench(1, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  326. run_bench(1, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  327. run_bench(1, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  328. // bottleneck-2
  329. // proj
  330. run_bench(1, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  331. run_bench(1, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  332. run_bench(1, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  333. run_bench(1, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  334. // bottleneck-3
  335. // proj
  336. run_bench(1, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  337. run_bench(1, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  338. run_bench(1, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  339. run_bench(1, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  340. // bottleneck-4
  341. // proj
  342. run_bench(1, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  343. run_bench(1, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  344. run_bench(1, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  345. run_bench(1, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  346. run_bench(32, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  347. run_bench(32, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  348. run_bench(32, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  349. run_bench(32, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  350. run_bench(32, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  351. run_bench(32, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  352. run_bench(32, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  353. run_bench(32, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  354. run_bench(32, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  355. run_bench(32, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  356. run_bench(32, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  357. run_bench(32, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  358. run_bench(32, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  359. run_bench(32, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  360. run_bench(32, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  361. run_bench(32, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  362. run_bench(256, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  363. run_bench(256, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  364. run_bench(256, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  365. run_bench(256, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  366. run_bench(256, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  367. run_bench(256, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  368. run_bench(256, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  369. run_bench(256, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  370. run_bench(256, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  371. run_bench(256, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  372. run_bench(256, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  373. run_bench(256, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  374. run_bench(256, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  375. run_bench(256, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  376. run_bench(256, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  377. run_bench(256, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  378. }
  379. #endif
  380. TEST_F(CUDA, CONV_BIAS_FORWARD_NCHW4) {
  381. require_compute_capability(6, 1);
  382. using namespace conv_bias;
  383. Checker<ConvBiasForward> checker(handle_cuda());
  384. UniformIntRNG int_rng{-5, 5};
  385. ConvBias::Param param;
  386. param.format = ConvBias::Param::Format::NCHW4;
  387. param.nonlineMode = ConvBias::Param::NonlineMode::IDENTITY;
  388. checker.set_dtype(0, dtype::QuantizedS8(0.5f))
  389. .set_dtype(1, dtype::QuantizedS8(0.5f))
  390. .set_dtype(2, dtype::QuantizedS32(0.25f))
  391. .set_dtype(3, dtype::QuantizedS8(0.13f))
  392. .set_dtype(4, dtype::QuantizedS8(0.35f))
  393. .set_rng(0, &int_rng)
  394. .set_rng(1, &int_rng)
  395. .set_rng(2, &int_rng)
  396. .set_rng(3, &int_rng)
  397. .set_param(param);
  398. auto opr = handle_cuda()->create_operator<ConvBias>();
  399. auto run = [&](const TensorShapeArray& shapes) {
  400. opr->param() = param;
  401. TensorLayout dst_layout;
  402. opr->deduce_layout({shapes[0], dtype::Float32()},
  403. {shapes[1], dtype::Float32()}, {}, {}, dst_layout);
  404. checker.execs({shapes[0], shapes[1], shapes[2], dst_layout, {}});
  405. };
  406. run({{1, 4, 4, 4, 4}, {4, 4, 3, 3, 4}, {1, 1, 1, 1, 4}});
  407. run({{20, 1, 24, 24, 4}, {24, 1, 2, 2, 4}, {1, 6, 1, 1, 4}});
  408. run({{20, 2, 24, 24, 4}, {24, 2, 3, 3, 4}, {1, 6, 1, 1, 4}});
  409. param.sparse = ConvBias::Param::Sparse::GROUP;
  410. checker.set_param(param);
  411. run({{1, 4, 24, 24, 4}, {4, 4, 1, 1, 1, 4}, {1, 4, 1, 1, 4}});
  412. run({{20, 8, 24, 24, 4}, {4, 24, 2, 2, 2, 4}, {1, 24, 1, 1, 4}});
  413. run({{1, 3, 24, 24, 4}, {3, 8, 1, 3, 3, 4}, {1, 6, 1, 1, 4}});
  414. param.pad_h = param.pad_w = 1;
  415. param.stride_h = param.stride_w = 2;
  416. checker.set_param(param);
  417. run({{10, 16, 28, 28, 4}, {8, 8, 2, 3, 3, 4}, {1, 16, 1, 1, 4}});
  418. // case which cudnn not supported
  419. param.sparse = ConvBias::Param::Sparse::DENSE;
  420. param.pad_h = param.pad_w = 1;
  421. param.stride_h = param.stride_w = 1;
  422. checker.set_param(param);
  423. checker.exec({{1, 4, 2, 2, 4}, {16, 4, 3, 3, 4}, {1, 4, 1, 1, 4}, {}, {}});
  424. }
  425. //! FIXME: conv kernel of cudnn for NCHW4_NCHW tensor format causes illegal
  426. //! memory access errors, so we have to disable this test here.
  427. #if 0
  428. TEST_F(CUDA, CONV_BIAS_FORWARD_NCHW4_NCHW) {
  429. require_compute_capability(6, 1);
  430. using namespace conv_bias;
  431. Checker<ConvBiasForward> checker(handle_cuda());
  432. UniformIntRNG int_rng{-3, 3};
  433. UniformFloatRNG float_rng{-50, 50};
  434. ConvBias::Param param;
  435. param.format = ConvBias::Param::Format::NCHW4_NCHW;
  436. param.nonlineMode = ConvBias::Param::NonlineMode::IDENTITY;
  437. checker.set_dtype(0, dtype::QuantizedS8(1.9980618f))
  438. .set_dtype(1, dtype::QuantizedS8(1.9980927f))
  439. .set_dtype(2, dtype::Float32())
  440. .set_dtype(3, dtype::Float32())
  441. .set_dtype(4, dtype::Float32())
  442. .set_rng(0, &int_rng)
  443. .set_rng(1, &int_rng)
  444. .set_rng(2, &float_rng)
  445. .set_rng(3, &float_rng)
  446. .set_param(param);
  447. auto opr = handle_cuda()->create_operator<ConvBias>();
  448. auto run = [&](const TensorShapeArray& shapes) {
  449. opr->param() = param;
  450. TensorLayout dst_layout;
  451. opr->deduce_layout({shapes[0], dtype::Float32()},
  452. {shapes[1], dtype::Float32()}, {}, {}, dst_layout);
  453. checker.execs({shapes[0], shapes[1], shapes[2], dst_layout, {}});
  454. };
  455. run({{1, 4, 4, 4, 4}, {4, 4, 3, 3, 4}, {1, 4, 1, 1}});
  456. run({{20, 1, 24, 24, 4}, {24, 1, 2, 2, 4}, {1, 24, 1, 1}});
  457. run({{20, 2, 24, 24, 4}, {24, 2, 3, 3, 4}, {1, 24, 1, 1}});
  458. param.sparse = ConvBias::Param::Sparse::GROUP;
  459. param.nonlineMode = ConvBias::Param::NonlineMode::RELU;
  460. checker.set_param(param);
  461. run({{1, 4, 24, 24, 4}, {4, 4, 1, 1, 1, 4}, {1, 16, 1, 1}});
  462. run({{20, 8, 24, 24, 4}, {4, 24, 2, 2, 2, 4}, {1, 96, 1, 1}});
  463. run({{1, 3, 24, 24, 4}, {3, 8, 1, 3, 3, 4}, {1, 24, 1, 1}});
  464. param.pad_h = param.pad_w = 1;
  465. param.stride_h = param.stride_w = 2;
  466. checker.set_param(param);
  467. run({{10, 16, 28, 28, 4}, {8, 8, 2, 3, 3, 4}, {1, 64, 1, 1}});
  468. // case which cudnn not supported
  469. param.sparse = ConvBias::Param::Sparse::DENSE;
  470. param.pad_h = param.pad_w = 1;
  471. param.stride_h = param.stride_w = 1;
  472. param.nonlineMode = ConvBias::Param::NonlineMode::H_SWISH;
  473. checker.set_param(param);
  474. checker.exec({{1, 4, 2, 2, 4}, {16, 4, 3, 3, 4}, {1, 16, 1, 1}, {}, {}});
  475. }
  476. #endif
  477. #endif
  478. TEST_F(CUDA, CONV_BIAS_FORWARD_CHANWISE) {
  479. Checker<ConvBiasForward> checker(handle_cuda());
  480. std::vector<TestArg> args = get_chanwise_args();
  481. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  482. ConvBiasForward::algo_name<ConvBias::DirectParam>("CHANNEL_WISE",
  483. {})
  484. .c_str()));
  485. for (auto dtype : std::vector<DType>{dtype::Float32(), dtype::Float16()}) {
  486. checker.set_dtype(0, dtype)
  487. .set_dtype(1, dtype)
  488. .set_dtype(2, dtype)
  489. .set_dtype(3, dtype)
  490. .set_dtype(4, dtype);
  491. if (dtype.enumv() == DTypeEnum::Float16)
  492. checker.set_epsilon(2e-2);
  493. for (auto&& arg : args) {
  494. checker.set_param(arg.param).execs(
  495. {arg.src, arg.filter, arg.bias, {}, {}});
  496. }
  497. }
  498. }
  499. TEST_F(CUDA, CONV_BIAS_FORWARD_CHANWISE_SMALL) {
  500. Checker<ConvBiasForward> checker(handle_cuda());
  501. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  502. ConvBiasForward::algo_name<ConvBias::DirectParam>(
  503. "CHANNEL_WISE_SMALL", {})
  504. .c_str()));
  505. param::ConvBias cur_param;
  506. using NLMode = param::ConvBias::NonlineMode;
  507. cur_param.mode = param::ConvBias::Mode::CROSS_CORRELATION;
  508. cur_param.sparse = ConvBias::Param::Sparse::GROUP;
  509. for (auto nlmode :
  510. {NLMode::IDENTITY, NLMode::RELU, NLMode::SIGMOID, NLMode::H_SWISH}) {
  511. cur_param.nonlineMode = nlmode;
  512. for (auto dtype : std::vector<DType> {
  513. dtype::Float32(),
  514. #if CUDA_VERSION >= 9000
  515. dtype::Float16()
  516. #endif
  517. }) {
  518. checker.set_dtype(0, dtype)
  519. .set_dtype(1, dtype)
  520. .set_dtype(2, dtype)
  521. .set_dtype(3, dtype)
  522. .set_dtype(4, dtype);
  523. if (dtype.enumv() == DTypeEnum::Float16)
  524. checker.set_epsilon(2e-2);
  525. for (uint32_t s : {1}) {
  526. for (uint32_t f : {1, 3, 5, 7}) {
  527. cur_param.pad_h = cur_param.pad_w = f / 2;
  528. cur_param.stride_h = cur_param.stride_w = s;
  529. checker.set_param(cur_param).execs({{2, 3, 16, 16},
  530. {3, 1, 1, f, f},
  531. {1, 3, 1, 1},
  532. {},
  533. {}});
  534. }
  535. }
  536. cur_param.pad_h = cur_param.pad_w = 1;
  537. cur_param.stride_h = cur_param.stride_w = 1;
  538. checker.set_param(cur_param)
  539. .execs({{2, 3, 3, 16},
  540. {3, 1, 1, 3, 3},
  541. {1, 3, 1, 1},
  542. {},
  543. {}})
  544. .execs({{2, 3, 8, 3},
  545. {3, 1, 1, 3, 3},
  546. {1, 3, 1, 1},
  547. {},
  548. {}});
  549. }
  550. }
  551. }
  552. TEST_F(CUDA, CONV_BIAS_FORWARD_CHANWISE_8x8x32) {
  553. require_compute_capability(6, 1);
  554. Checker<ConvBiasForward> checker(handle_cuda());
  555. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  556. ConvBiasForward::algo_name<ConvBias::DirectParam>(
  557. "CHANNEL_WISE_8X8X32", {})
  558. .c_str()));
  559. param::ConvBias cur_param;
  560. using NLMode = param::ConvBias::NonlineMode;
  561. cur_param.mode = param::ConvBias::Mode::CROSS_CORRELATION;
  562. cur_param.sparse = ConvBias::Param::Sparse::GROUP;
  563. cur_param.format = ConvBias::Param::Format::NHWC;
  564. UniformIntRNG rng(-4, 4);
  565. checker.set_dtype(0, dtype::Int8{})
  566. .set_dtype(1, dtype::Int8{})
  567. .set_dtype(2, dtype::Int32{})
  568. .set_dtype(4, dtype::Int32{})
  569. .set_rng(0, &rng)
  570. .set_rng(1, &rng)
  571. .set_rng(2, &rng);
  572. for (auto nlmode : {NLMode::IDENTITY, NLMode::RELU}) {
  573. cur_param.nonlineMode = nlmode;
  574. for (uint32_t s : {1, 2}) {
  575. for (uint32_t f : {1, 3, 5, 7}) {
  576. for (uint32_t g : {4, 8}) {
  577. cur_param.pad_h = cur_param.pad_w = f / 2;
  578. cur_param.stride_h = cur_param.stride_w = s;
  579. checker.set_param(cur_param).execs({{2, 9, 16, g},
  580. {g, 1, f, f, 1},
  581. {1, 1, 1, g},
  582. {},
  583. {}});
  584. }
  585. }
  586. }
  587. }
  588. }
  589. TEST_F(CUDA, CONV_BIAS_FORWARD_CUDNN_CONVOLUTION) {
  590. using namespace conv_bias;
  591. std::vector<TestArg> args = get_args();
  592. Checker<ConvBiasForward> checker(handle_cuda());
  593. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  594. ConvBiasForward::algo_name<ConvBias::DefaultParam>(
  595. "CUDNN:Convolution", {})
  596. .c_str()));
  597. NormalRNG default_rng;
  598. for (auto&& arg : args) {
  599. checker.set_dtype(0, dtype::Float32())
  600. .set_dtype(1, dtype::Float32())
  601. .set_dtype(2, dtype::Float32())
  602. .set_rng(0, &default_rng)
  603. .set_rng(1, &default_rng)
  604. .set_rng(2, &default_rng)
  605. .set_epsilon(1e-3)
  606. .set_param(arg.param)
  607. .execs({arg.src, arg.filter, arg.bias, {}, {}});
  608. }
  609. }
  610. TEST_F(CUDA, CONV_BIAS_FORWARD_INPLACE_MATMUL) {
  611. using namespace conv_bias;
  612. std::vector<TestArg> args = get_args();
  613. Checker<ConvBiasForward> checker(handle_cuda());
  614. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  615. ConvBiasForward::algo_name<ConvBias::MatmulParam>("INPLACE_MATMUL",
  616. {})
  617. .c_str()));
  618. param::ConvBias cur_param;
  619. using NLMode = param::ConvBias::NonlineMode;
  620. cur_param.mode = param::ConvBias::Mode::CROSS_CORRELATION;
  621. cur_param.sparse = ConvBias::Param::Sparse::DENSE;
  622. NormalRNG default_rng;
  623. checker.set_dtype(0, dtype::Float32())
  624. .set_dtype(1, dtype::Float32())
  625. .set_dtype(2, dtype::Float32())
  626. .set_rng(0, &default_rng)
  627. .set_rng(1, &default_rng)
  628. .set_rng(2, &default_rng)
  629. .set_epsilon(1e-3);
  630. for (auto nlmode :
  631. {NLMode::IDENTITY, NLMode::RELU, NLMode::SIGMOID, NLMode::H_SWISH}) {
  632. cur_param.nonlineMode = nlmode;
  633. for (uint32_t s : {1}) {
  634. for (uint32_t f : {1, 3, 5, 7}) {
  635. cur_param.pad_h = cur_param.pad_w = f / 2;
  636. cur_param.stride_h = cur_param.stride_w = s;
  637. checker.set_param(cur_param).execs(
  638. {{2, 4, 16, 16}, {4, 4, f, f}, {1, 4, 1, 1}, {}, {}});
  639. }
  640. }
  641. cur_param.pad_h = cur_param.pad_w = 1;
  642. cur_param.stride_h = cur_param.stride_w = 1;
  643. checker.set_param(cur_param)
  644. .execs({{2, 3, 3, 16}, {5, 3, 3, 3}, {1, 5, 1, 1}, {}, {}})
  645. .execs({{2, 2, 8, 3}, {3, 2, 3, 3}, {1, 3, 1, 1}, {}, {}});
  646. }
  647. }
  648. TEST_F(CUDA, CONV_BIAS_FORWARD_MATMUL) {
  649. using namespace conv_bias;
  650. std::vector<TestArg> args = get_args();
  651. Checker<ConvBiasForward> checker(handle_cuda());
  652. checker.set_before_exec_callback(
  653. AlgoChecker<ConvBiasForward>(ExecutionPolicyAlgoName{
  654. ConvBiasForward::algo_name<ConvBiasForward::MatmulParam>(
  655. "MATMUL", {})
  656. .c_str(),
  657. {{"CUBLAS", {}}}}));
  658. param::ConvBias cur_param;
  659. using NLMode = param::ConvBias::NonlineMode;
  660. cur_param.mode = param::ConvBias::Mode::CROSS_CORRELATION;
  661. cur_param.sparse = ConvBias::Param::Sparse::DENSE;
  662. NormalRNG default_rng;
  663. checker.set_dtype(0, dtype::Float32())
  664. .set_dtype(1, dtype::Float32())
  665. .set_dtype(2, dtype::Float32())
  666. .set_rng(0, &default_rng)
  667. .set_rng(1, &default_rng)
  668. .set_rng(2, &default_rng)
  669. .set_epsilon(1e-3);
  670. for (auto nlmode :
  671. {NLMode::IDENTITY, NLMode::RELU, NLMode::SIGMOID, NLMode::H_SWISH}) {
  672. cur_param.nonlineMode = nlmode;
  673. for (uint32_t s : {1}) {
  674. for (uint32_t f : {1, 3, 5, 7}) {
  675. cur_param.pad_h = cur_param.pad_w = f / 2;
  676. cur_param.stride_h = cur_param.stride_w = s;
  677. checker.set_param(cur_param).execs(
  678. {{2, 4, 16, 16}, {4, 4, f, f}, {1, 4, 1, 1}, {}, {}});
  679. }
  680. }
  681. cur_param.pad_h = cur_param.pad_w = 0;
  682. cur_param.stride_h = cur_param.stride_w = 1;
  683. checker.set_param(cur_param)
  684. .execs({{2, 3, 3, 16}, {5, 3, 3, 3}, {1, 5, 1, 1}, {}, {}})
  685. .execs({{2, 2, 8, 3}, {3, 2, 3, 3}, {1, 3, 1, 1}, {}, {}});
  686. }
  687. }
  688. TEST_F(CUDA, CONV_BIAS_FORWARD_MATMUL_8x8x32) {
  689. require_compute_capability(6, 1);
  690. Checker<ConvBiasForward> checker(handle_cuda());
  691. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  692. ConvBiasForward::algo_name<ConvBiasForward::MatmulParam>(
  693. "MATMUL8X8X32", {})
  694. .c_str()));
  695. param::ConvBias cur_param;
  696. using NLMode = param::ConvBias::NonlineMode;
  697. cur_param.mode = param::ConvBias::Mode::CROSS_CORRELATION;
  698. cur_param.sparse = ConvBias::Param::Sparse::DENSE;
  699. cur_param.format = param::ConvBias::Format::NHWC;
  700. UniformIntRNG rng{-100, 100};
  701. UniformIntRNG bias_rng{-1000, 1000};
  702. checker.set_rng(0, &rng)
  703. .set_rng(1, &rng)
  704. .set_rng(2, &bias_rng)
  705. .set_rng(3, &rng)
  706. .set_dtype(0, dtype::QuantizedS8{1.2f})
  707. .set_dtype(1, dtype::QuantizedS8{1.3f})
  708. .set_dtype(2, dtype::QuantizedS32{1.2f * 1.3f})
  709. .set_dtype(3, dtype::QuantizedS8{1.1f})
  710. .set_dtype(4, dtype::QuantizedS8{1.0f})
  711. .set_epsilon(1);
  712. for (auto nlmode : {NLMode::IDENTITY, NLMode::RELU}) {
  713. cur_param.nonlineMode = nlmode;
  714. for (uint32_t s : {1}) {
  715. for (uint32_t f : {1, 3, 5, 7}) {
  716. cur_param.pad_h = cur_param.pad_w = f / 2;
  717. cur_param.stride_h = cur_param.stride_w = s;
  718. checker.set_param(cur_param).execs(
  719. {{2, 16, 16, 4}, {4, f, f, 4}, {1, 1, 1, 4}, {}, {}});
  720. }
  721. }
  722. cur_param.pad_h = cur_param.pad_w = 0;
  723. cur_param.stride_h = cur_param.stride_w = 1;
  724. checker.set_param(cur_param)
  725. .execs({{2, 3, 16, 3}, {5, 3, 3, 3}, {1, 1, 1, 5}, {}, {}})
  726. .execs({{2, 8, 3, 2}, {3, 3, 3, 2}, {1, 1, 1, 3}, {}, {}});
  727. }
  728. }
  729. TEST_F(CUDA, CONV_BIAS_FORWARD_MATMUL_NCHW4) {
  730. require_compute_capability(6, 1);
  731. Checker<ConvBiasForward> checker(handle_cuda());
  732. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<ConvBias>(
  733. ConvBiasForward::algo_name<ConvBiasForward::MatmulParam>(
  734. "MATMUL8X8X32", {})
  735. .c_str()));
  736. UniformIntRNG int_rng{-127, 127};
  737. ConvBias::Param param;
  738. param.format = ConvBias::Param::Format::NCHW4;
  739. using NLMode = ConvBias::Param::NonlineMode;
  740. checker.set_dtype(0, dtype::QuantizedS8(0.5f))
  741. .set_dtype(1, dtype::QuantizedS8(0.5f))
  742. .set_dtype(2, dtype::QuantizedS32(0.25f))
  743. .set_dtype(4, dtype::QuantizedS8(0.35f))
  744. .set_rng(0, &int_rng)
  745. .set_rng(1, &int_rng)
  746. .set_rng(2, &int_rng);
  747. param.sparse = Convolution::Param::Sparse::DENSE;
  748. param.nonlineMode = NLMode::IDENTITY;
  749. param.pad_h = param.pad_w = 1;
  750. param.stride_h = param.stride_w = 1;
  751. checker.set_param(param);
  752. checker.exec(
  753. {{8, 4, 10, 10, 4}, {16, 4, 3, 3, 4}, {1, 4, 1, 1, 4}, {}, {}});
  754. checker.exec({{1, 4, 2, 2, 4}, {16, 4, 3, 3, 4}, {1, 4, 1, 1, 4}, {}, {}});
  755. checker.exec(
  756. {{8, 64, 12, 12, 4}, {256, 64, 3, 3, 4}, {1, 64, 1, 1, 4}, {}, {}});
  757. }
  758. TEST_F(CUDA, CONV_BIAS_FORWARD_BATCHED_MATMUL) {
  759. using namespace conv_bias;
  760. std::vector<TestArg> args = get_args_1x1();
  761. Checker<ConvBiasForward> checker(handle_cuda());
  762. NormalRNG default_rng;
  763. checker.set_dtype(0, dtype::Float32())
  764. .set_dtype(1, dtype::Float32())
  765. .set_dtype(2, dtype::Float32())
  766. .set_rng(0, &default_rng)
  767. .set_rng(1, &default_rng)
  768. .set_rng(2, &default_rng)
  769. .set_epsilon(1e-3);
  770. checker.set_before_exec_callback(
  771. AlgoChecker<ConvBiasForward>(ExecutionPolicyAlgoName{
  772. ConvBiasForward::algo_name<ConvBiasForward::MatmulParam>(
  773. "BATCHED_MATMUL", {})
  774. .c_str(),
  775. {{"CUBLAS", {}}}}));
  776. for (auto&& arg : args) {
  777. checker.set_param(arg.param);
  778. checker.execs({arg.src, arg.filter, arg.bias, {}, {}});
  779. }
  780. }
  781. TEST_F(CUDA, CONV_BIAS_FORWARD_GROUP) {
  782. using NLMode = ConvBias::Param::NonlineMode;
  783. bool is_int_available = false;
  784. if (megdnn::test::check_compute_capability(6, 1)) {
  785. is_int_available = true;
  786. } else {
  787. is_int_available = false;
  788. }
  789. auto run = [&](size_t N, size_t IC, size_t IH, size_t IW, size_t FH,
  790. size_t FW, size_t OC, size_t PH, size_t PW, size_t SH,
  791. size_t SW, size_t DH, size_t DW, size_t group, NLMode mode) {
  792. {
  793. // float case
  794. Checker<ConvBiasForward> checker(handle_cuda());
  795. checker.set_before_exec_callback(conv_bias::ConvBiasAlgoChecker<
  796. ConvBias>(
  797. ConvBiasForward::algo_name<ConvBiasForward::DirectParam>(
  798. "CUDA:GROUP_CONV", {})
  799. .c_str()));
  800. ConvBias::Param param;
  801. param.sparse = ConvBias::Param::Sparse::GROUP;
  802. param.nonlineMode = mode;
  803. param.pad_h = PH;
  804. param.pad_w = PW;
  805. param.stride_h = SH;
  806. param.stride_w = SW;
  807. param.dilate_h = DH;
  808. param.dilate_w = DW;
  809. auto ICg = IC / group;
  810. auto OCg = OC / group;
  811. checker.set_param(param).exec({{N, IC, IH, IW},
  812. {group, OCg, ICg, FH, FW},
  813. {1, OCg * group, 1, 1},
  814. {},
  815. {}});
  816. }
  817. if (is_int_available) {
  818. // int 8x8x32 case
  819. Checker<ConvBiasForward> checker(handle_cuda());
  820. ConvBias::Param param;
  821. param.sparse = Convolution::Param::Sparse::GROUP;
  822. param.format = Convolution::Param::Format::NHWC;
  823. param.nonlineMode = NLMode::IDENTITY;
  824. param.pad_h = PH;
  825. param.pad_w = PW;
  826. param.stride_h = SH;
  827. param.stride_w = SW;
  828. param.dilate_h = DH;
  829. param.dilate_w = DW;
  830. auto ICg = IC / group;
  831. auto OCg = OC / group;
  832. UniformIntRNG rng(-4, 4);
  833. checker.set_param(param)
  834. .set_dtype(0, dtype::QuantizedS8(0.5f))
  835. .set_dtype(1, dtype::QuantizedS8(0.5f))
  836. .set_dtype(2, dtype::QuantizedS32(0.25f))
  837. .set_dtype(3, dtype::QuantizedS8(0.13f))
  838. .set_dtype(4, dtype::QuantizedS8(0.35f))
  839. .set_rng(0, &rng)
  840. .set_rng(1, &rng)
  841. .set_rng(2, &rng)
  842. .exec({{N, IH, IW, IC},
  843. {group, OCg, FH, FW, ICg},
  844. {1, 1, 1, OCg * group},
  845. {},
  846. {}});
  847. }
  848. };
  849. for (NLMode nlmode :
  850. {NLMode::IDENTITY, NLMode::RELU, NLMode::SIGMOID, NLMode::H_SWISH}) {
  851. // normal case
  852. run(2, 64, 7, 7, 3, 3, 32, 0, 0, 1, 1, 1, 1, 2, nlmode);
  853. // padded case
  854. run(2, 32, 7, 7, 3, 3, 64, 1, 1, 1, 1, 1, 1, 4, nlmode);
  855. // strided case
  856. run(2, 32, 7, 7, 3, 3, 64, 0, 0, 2, 2, 1, 1, 8, nlmode);
  857. // dilated case
  858. run(2, 32, 7, 7, 3, 3, 64, 0, 0, 1, 1, 2, 2, 8, nlmode);
  859. }
  860. }
  861. #if CUDA_VERSION >= 10000
  862. TEST_F(CUDA, CONV_BIAS_FORWARD_NCHW8_PART_1) {
  863. test_conv_bias_forward_wmma_int4_nchw8(handle_cuda(), 3);
  864. }
  865. TEST_F(CUDA, CONV_BIAS_FORWARD_NCHW8_PART_2) {
  866. test_conv_bias_forward_wmma_int4_nchw8(handle_cuda(), 5);
  867. }
  868. TEST_F(CUDA, CONV_BIAS_FORWARD_NCHW8_PART_3) {
  869. test_conv_bias_forward_wmma_int4_nchw8(handle_cuda(), 7);
  870. }
  871. #if MEGDNN_WITH_BENCHMARK
  872. TEST_F(CUDA, BENCHMARK_CONV_BIAS_QUANTIZED4x4x32) {
  873. require_compute_capability(7, 5);
  874. Benchmarker<ConvBiasForward> bencher(handle_cuda());
  875. UniformIntRNG int_rng{0, 8};
  876. ConvBias::Param param;
  877. param.format = ConvBias::Param::Format::NCHW8;
  878. param.stride_h = param.stride_w = 1;
  879. using NonlineMode = ConvBias::Param::NonlineMode;
  880. param.nonlineMode = NonlineMode::RELU;
  881. auto run_bench = [&](size_t batch, size_t ci, size_t hi, size_t wi,
  882. size_t co, size_t fh, size_t fw, size_t nr_times) {
  883. param.pad_h = fh / 2;
  884. param.pad_w = fw / 2;
  885. bencher.set_param(param)
  886. .set_dtype(0, dtype::Quantized4Asymm(1.3f, (uint8_t)(1)))
  887. .set_dtype(1, dtype::Quantized4Asymm(1.3f, (uint8_t)(2)))
  888. .set_dtype(2, dtype::QuantizedS32(1.3f * 1.3f))
  889. .set_dtype(4, dtype::QuantizedS32(1.3f * 1.3f))
  890. .set_rng(0, &int_rng)
  891. .set_rng(1, &int_rng)
  892. .set_rng(2, &int_rng);
  893. bencher.set_times(nr_times);
  894. size_t ho = infer_conv_shape(hi, fh, 1, param.pad_h);
  895. size_t wo = infer_conv_shape(wi, fw, 1, param.pad_w);
  896. TensorShape inp{batch, ci / 8, hi, wi, 8}, kern{co, ci / 8, fh, fw, 8},
  897. out{batch, co / 8, ho, wo, 8};
  898. auto time_in_ms =
  899. bencher.execs({inp, kern, {1, co / 8, 1, 1, 8}, {}, out}) /
  900. nr_times;
  901. auto ops = 2.0 * batch * co * ho * wo * ci * fh * fw /
  902. (time_in_ms * 1e-3) * 1e-12;
  903. printf("inp=%s, kern=%s, out=%s, time: %.2fms, perf: %.2f Tops\n",
  904. inp.to_string().c_str(), kern.to_string().c_str(),
  905. out.to_string().c_str(), time_in_ms, ops);
  906. };
  907. run_bench(256, 256, 16, 16, 256, 3, 3, 1000);
  908. run_bench(1, 32, 224, 224, 64, 7, 7, 1000);
  909. run_bench(1, 8192, 64, 64, 4096, 3, 3, 1000);
  910. run_bench(1, 256, 64, 64, 256, 3, 3, 1000);
  911. run_bench(1, 64, 128, 128, 64, 3, 3, 1000);
  912. run_bench(1, 512, 32, 32, 512, 3, 3, 1000);
  913. run_bench(1, 1024, 16, 16, 1024, 3, 3, 1000);
  914. run_bench(1, 64, 56, 56, 64, 3, 3, 1000);
  915. run_bench(1, 128, 32, 32, 128, 3, 3, 1000);
  916. run_bench(1, 256, 16, 16, 256, 3, 3, 1000);
  917. run_bench(1, 512, 8, 8, 512, 3, 3, 1000);
  918. run_bench(32, 32, 224, 224, 64, 7, 7, 1000);
  919. run_bench(32, 64, 56, 56, 64, 3, 3, 1000);
  920. run_bench(32, 128, 32, 32, 128, 3, 3, 1000);
  921. run_bench(32, 256, 16, 16, 256, 3, 3, 1000);
  922. run_bench(32, 512, 8, 8, 512, 3, 3, 1000);
  923. run_bench(256, 32, 224, 224, 64, 7, 7, 1000);
  924. run_bench(256, 64, 56, 56, 64, 3, 3, 1000);
  925. run_bench(256, 128, 32, 32, 128, 3, 3, 1000);
  926. run_bench(256, 256, 16, 16, 256, 3, 3, 1000);
  927. run_bench(256, 512, 8, 8, 512, 3, 3, 1000);
  928. }
  929. #endif
  930. #endif
  931. TEST_F(CUDA, CONV_BIAS_FORWARD_DILATED) {
  932. require_compute_capability(6, 0);
  933. auto run = [&](size_t N, size_t IC, size_t IH, size_t IW, size_t FH,
  934. size_t FW, size_t OC, size_t PH, size_t PW, size_t SH,
  935. size_t SW, size_t DH, size_t DW) {
  936. {
  937. // float case
  938. Checker<ConvBiasForward> checker(handle_cuda());
  939. ConvBias::Param param;
  940. param.sparse = ConvBias::Param::Sparse::DENSE;
  941. param.pad_h = PH;
  942. param.pad_w = PW;
  943. param.stride_h = SH;
  944. param.stride_w = SW;
  945. param.dilate_h = DH;
  946. param.dilate_w = DW;
  947. param.nonlineMode = ConvBias::Param::NonlineMode::IDENTITY;
  948. checker.set_param(param).exec(
  949. {{N, IC, IH, IW}, {OC, IC, FH, FW}, {1, OC, 1, 1}, {}, {}});
  950. }
  951. };
  952. // dilated case
  953. run(2, 8, 7, 7, 3, 3, 4, 0, 0, 1, 1, 2, 2);
  954. }
  955. #if CUDNN_VERSION >= 7500
  956. TEST_F(CUDA, CONV_BIAS_FORWARD_TENSORCORE_INT8) {
  957. require_compute_capability(7, 5);
  958. using namespace conv_bias;
  959. Checker<ConvBiasForward> checker(handle_cuda());
  960. auto opr = handle_cuda()->create_operator<ConvBias>();
  961. auto i8_min = std::numeric_limits<int8_t>().min();
  962. auto i8_max = std::numeric_limits<int8_t>().max();
  963. UniformIntRNG int_rng{i8_min, i8_max};
  964. ConvBias::Param param;
  965. param.format = ConvBias::Param::Format::NCHW32;
  966. using NonlineMode = ConvBias::Param::NonlineMode;
  967. for (NonlineMode mode : {NonlineMode::IDENTITY, NonlineMode::RELU}) {
  968. for (size_t batch : {2}) {
  969. for (size_t ic : {64, 32}) {
  970. for (size_t oc : {32}) {
  971. for (size_t fh : {3, 5, 7}) {
  972. for (int ph : {static_cast<int>(fh / 2), 0}) {
  973. for (int sh : {1, 2}) {
  974. for (size_t ih : {9, 11, 12, 13, 16}) {
  975. for (size_t iw : {8, 27, 32, 40}) {
  976. param.nonlineMode = mode;
  977. param.stride_h = param.stride_w = sh;
  978. param.pad_h = param.pad_w = ph;
  979. opr->param() = param;
  980. TensorLayout dst_layout;
  981. opr->deduce_layout(
  982. {{batch, ic / 32, ih, iw, 32},
  983. dtype::Float32()},
  984. {{oc, ic / 32, fh, fh, 32},
  985. dtype::Float32()},
  986. {}, {}, dst_layout);
  987. checker.set_dtype(0, dtype::QuantizedS8(
  988. 1.3f))
  989. .set_dtype(1,
  990. dtype::QuantizedS8(
  991. 1.3f))
  992. .set_dtype(2,
  993. dtype::QuantizedS32(
  994. 1.3f * 1.3f))
  995. .set_dtype(3,
  996. dtype::QuantizedS8(
  997. 1.7f))
  998. .set_dtype(4,
  999. dtype::QuantizedS8(
  1000. 1.2f * 1.2f))
  1001. .set_rng(0, &int_rng)
  1002. .set_rng(1, &int_rng)
  1003. .set_rng(2, &int_rng)
  1004. .set_rng(3, &int_rng)
  1005. .set_epsilon(1 + 1e-3)
  1006. .set_param(param)
  1007. .execs({{batch, ic / 32, ih, iw,
  1008. 32},
  1009. {oc, ic / 32, fh, fh,
  1010. 32},
  1011. {1, oc / 32, 1, 1, 32},
  1012. dst_layout,
  1013. {}});
  1014. }
  1015. }
  1016. }
  1017. }
  1018. }
  1019. }
  1020. }
  1021. }
  1022. }
  1023. }
  1024. #if MEGDNN_WITH_BENCHMARK
  1025. TEST_F(CUDA, BENCHMARK_CONV_BIAS_FORWARD_TENSORCORE_INT8) {
  1026. require_compute_capability(7, 5);
  1027. Benchmarker<ConvBiasForward> bencher(handle_cuda());
  1028. bencher.set_display(false);
  1029. ConvBias::Param param;
  1030. param.format = ConvBias::Param::Format::NCHW32;
  1031. ConvBias::Param param_without_tensorcore;
  1032. param_without_tensorcore.format = ConvBias::Param::Format::NCHW4;
  1033. auto i8_min = std::numeric_limits<int8_t>().min();
  1034. auto i8_max = std::numeric_limits<int8_t>().max();
  1035. UniformIntRNG int_rng{i8_min, i8_max};
  1036. using NonlineMode = ConvBias::Param::NonlineMode;
  1037. param.nonlineMode = NonlineMode::IDENTITY;
  1038. auto run_bench = [&](size_t batch, size_t ci, size_t hi, size_t wi,
  1039. size_t co, size_t fh, size_t fw, size_t sh, size_t sw,
  1040. size_t nr_times) {
  1041. param.pad_h = fh / 2;
  1042. param.pad_w = fw / 2;
  1043. param.stride_h = sh;
  1044. param.stride_w = sw;
  1045. param_without_tensorcore.pad_h = fh / 2;
  1046. param_without_tensorcore.pad_w = fw / 2;
  1047. param_without_tensorcore.stride_h = sh;
  1048. param_without_tensorcore.stride_w = sw;
  1049. bencher.set_param(param)
  1050. .set_dtype(0, dtype::QuantizedS8(1.3f))
  1051. .set_dtype(1, dtype::QuantizedS8(1.3f))
  1052. .set_dtype(2, dtype::QuantizedS32(1.3f * 1.3f))
  1053. .set_dtype(4, dtype::QuantizedS8(1.2f))
  1054. .set_rng(0, &int_rng)
  1055. .set_rng(1, &int_rng)
  1056. .set_rng(2, &int_rng);
  1057. bencher.set_times(nr_times);
  1058. size_t ho = infer_conv_shape(hi, fh, sh, param.pad_h);
  1059. size_t wo = infer_conv_shape(wi, fw, sw, param.pad_w);
  1060. TensorShape inp{batch, ci / 32, hi, wi, 32},
  1061. kern{co, ci / 32, fh, fw, 32}, out{batch, co / 32, ho, wo, 32};
  1062. auto time_in_ms =
  1063. bencher.execs({inp, kern, {1, co / 32, 1, 1, 32}, {}, out}) /
  1064. nr_times;
  1065. auto ops = 2.0 * batch * co * ho * wo * ci * fh * fw /
  1066. (time_in_ms * 1e-3) * 1e-12;
  1067. printf("inp=%s, kern=%s, out=%s, time: %.2fms, perf: %.2f Tops "
  1068. "(TensorCore)",
  1069. inp.to_string().c_str(), kern.to_string().c_str(),
  1070. out.to_string().c_str(), time_in_ms, ops);
  1071. decltype(ops) ops_without_tensorcore;
  1072. bencher.set_param(param_without_tensorcore);
  1073. {
  1074. TensorShape inp{batch, ci / 4, hi, wi, 4},
  1075. kern{co, ci / 4, fh, fw, 4}, out{batch, co / 4, ho, wo, 4};
  1076. auto time_in_ms =
  1077. bencher.execs({inp, kern, {1, co / 4, 1, 1, 4}, {}, out}) /
  1078. nr_times;
  1079. ops_without_tensorcore = 2.0 * batch * co * ho * wo * ci * fh * fw /
  1080. (time_in_ms * 1e-3) * 1e-12;
  1081. printf(", time: %.2fms perf: %.2f Tops (without TensorCore) ",
  1082. time_in_ms, ops_without_tensorcore);
  1083. }
  1084. printf("speedup: %.2fx\n", ops / ops_without_tensorcore);
  1085. };
  1086. // resnet-50
  1087. // bottleneck-1
  1088. // proj
  1089. run_bench(1, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1090. run_bench(1, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  1091. run_bench(1, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  1092. run_bench(1, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1093. // bottleneck-2
  1094. // proj
  1095. run_bench(1, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  1096. run_bench(1, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  1097. run_bench(1, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  1098. run_bench(1, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  1099. // bottleneck-3
  1100. // proj
  1101. run_bench(1, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  1102. run_bench(1, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  1103. run_bench(1, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  1104. run_bench(1, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  1105. // bottleneck-4
  1106. // proj
  1107. run_bench(1, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  1108. run_bench(1, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  1109. run_bench(1, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  1110. run_bench(1, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  1111. run_bench(32, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1112. run_bench(32, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  1113. run_bench(32, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  1114. run_bench(32, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1115. run_bench(32, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  1116. run_bench(32, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  1117. run_bench(32, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  1118. run_bench(32, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  1119. run_bench(32, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  1120. run_bench(32, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  1121. run_bench(32, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  1122. run_bench(32, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  1123. run_bench(32, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  1124. run_bench(32, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  1125. run_bench(32, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  1126. run_bench(32, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  1127. run_bench(256, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1128. run_bench(256, 64, 56, 56, 64, 1, 1, 1, 1, 1000);
  1129. run_bench(256, 64, 56, 56, 64, 3, 3, 1, 1, 1000);
  1130. run_bench(256, 64, 56, 56, 256, 1, 1, 1, 1, 1000);
  1131. run_bench(256, 256, 56, 56, 512, 1, 1, 2, 2, 1000);
  1132. run_bench(256, 256, 56, 56, 128, 1, 1, 2, 2, 1000);
  1133. run_bench(256, 128, 28, 28, 128, 3, 3, 1, 1, 1000);
  1134. run_bench(256, 128, 28, 28, 512, 1, 1, 1, 1, 1000);
  1135. run_bench(256, 512, 28, 28, 1024, 1, 1, 2, 2, 1000);
  1136. run_bench(256, 512, 28, 28, 256, 1, 1, 2, 2, 1000);
  1137. run_bench(256, 256, 14, 14, 256, 3, 3, 1, 1, 1000);
  1138. run_bench(256, 256, 14, 14, 1024, 1, 1, 1, 1, 1000);
  1139. run_bench(256, 1024, 14, 14, 2048, 1, 1, 2, 2, 1000);
  1140. run_bench(256, 1024, 14, 14, 512, 1, 1, 2, 2, 1000);
  1141. run_bench(256, 512, 7, 7, 512, 3, 3, 1, 1, 1000);
  1142. run_bench(256, 512, 7, 7, 2048, 1, 1, 1, 1, 1000);
  1143. }
  1144. #endif
  1145. #endif
  1146. // vim: syntax=cpp.doxygen

MegEngine 安装包中集成了使用 GPU 运行代码所需的 CUDA 环境,不用区分 CPU 和 GPU 版。 如果想要运行 GPU 程序,请确保机器本身配有 GPU 硬件设备并安装好驱动。 如果你想体验在云端 GPU 算力平台进行深度学习开发的感觉,欢迎访问 MegStudio 平台