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fix(dnn/cuda): disable pascal sass conv2d

GitOrigin-RevId: 385d066595
tags/v1.0.0-rc1
Megvii Engine Team 4 years ago
parent
commit
3a03fa7a50
2 changed files with 4 additions and 2 deletions
  1. +3
    -2
      dnn/src/cuda/conv_bias/algo.cpp
  2. +1
    -0
      dnn/test/cuda/conv_bias_int8.cpp

+ 3
- 2
dnn/src/cuda/conv_bias/algo.cpp View File

@@ -6,7 +6,8 @@
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* "AS IS" BASIS, WITHOUT ARRANTIES OR CONDITIONS OF ANY KIND, either express or
* implied.
*/

#include "src/cuda/conv_bias/algo.h"
@@ -47,7 +48,7 @@ ConvBiasForwardImpl::AlgoPack::AlgoPack() {
conv_algos.reserve(conv_algos.size() * 2);
//! add gconv algos by AlgoGroupConvGeneral
size_t algo_size = conv_algos.size();
for (size_t i = 3; i < algo_size; ++ i) {
for (size_t i = 3; i < algo_size; ++i) {
gconv_refhold.emplace_back(new AlgoGroupConvGeneral(conv_algos[i]));
algo2gconv[conv_algos[i]] = gconv_refhold.back().get();
conv_algos.push_back(gconv_refhold.back().get());


+ 1
- 0
dnn/test/cuda/conv_bias_int8.cpp View File

@@ -1076,6 +1076,7 @@ TEST_F(CUDA, CONV_BIAS_INT8_CHWN4_UNROLL_WIDTH_TENSORCORE_1x1_ALGO_2) {
}



#if CUDA_VERSION >= 10020
/// \note: we only check several cases and block sizes in megdnn_test, the full
/// testcases are written in cutlass repository


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