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MegEngine
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11 Commits (5d0f8da46a4975c3c1a290299b839411faee732a)

Author SHA1 Message Date
  Megvii Engine Team 5d0f8da46a feat(mgb/jit): add Dimshuffle and lowering passes in jit mlir backend 4 years ago
  Megvii Engine Team 0007b9e09b build(third_party): update llvm-project 4 years ago
  Megvii Engine Team 404ef808fa feat(mgb/jit): adapt jit mlir backend to new mgb dialect and add typecvt 4 years ago
  Megvii Engine Team 9682db9820 feat(mgb): add jit mlir elemwise broadcast 4 years ago
  Megvii Engine Team 170897f2e1 feat(mgb/jit): add more elemwise modes for mlir backend 4 years ago
  Megvii Engine Team f87bba6806 feat(mgb/jit): add scalar support for mlir 4 years ago
  Megvii Engine Team 11b121a7d2 fix(mgb/jit): link libdevice.bc when generate nvvm ir 4 years ago
  Megvii Engine Team 9767ca8f19 feat(mgb/jit): refactor code and add more elemwise mode 4 years ago
  Megvii Engine Team a51d5b4c31 feat(mgb/jit): add mlir backend for cpu and cuda 4 years ago
  Megvii Engine Team 5fe7cd1457 fix(mge/jit): fix typo InternalGraphGenerator 5 years ago
  Megvii Engine Team f91881ffdc MegEngine: Initial commit of MegEngine. 5 years ago