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ffts plus task cv case

pull/1925/head
liudingyan 3 years ago
parent
44ecc342c9
commit
b97d6dd215
11 changed files with 753 additions and 44 deletions
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  1. +7
    -1
      ge/graph/load/model_manager/davinci_model.cc
  2. +47
    -18
      ge/graph/load/model_manager/task_info/ffts_plus_task_info.cc
  3. +6
    -0
      ge/graph/load/model_manager/task_info/ffts_plus_task_info.h
  4. +1
    -1
      ge/graph/partition/graph_partition.cc
  5. +1
    -1
      metadef
  6. +12
    -0
      tests/depends/runtime/src/runtime_stub.cc
  7. +8
    -1
      tests/framework/ge_running_env/src/engine/fake_compound_optimizer.cc
  8. +6
    -21
      tests/st/testcase/test_ffts_plus.cc
  9. +2
    -0
      tests/ut/ge/CMakeLists.txt
  10. +662
    -0
      tests/ut/ge/graph/load/ffts_plus_task_info_unittest.cc
  11. +1
    -1
      third_party/fwkacllib/inc/runtime/rt_ffts.h

+ 7
- 1
ge/graph/load/model_manager/davinci_model.cc View File

@@ -3731,7 +3731,8 @@ Status DavinciModel::InitTbeHandle(const OpDescPtr &op_desc) {
}

Status DavinciModel::InitTbeHandleWithFfts(const OpDescPtr &op_desc) {
std::vector<OpKernelBinPtr> tbe_kernel = op_desc->TryGetExtAttr(OP_EXTATTR_NAME_THREAD_TBE_KERNEL, tbe_kernel);
std::vector<OpKernelBinPtr> tbe_kernel;
tbe_kernel = op_desc->TryGetExtAttr(OP_EXTATTR_NAME_THREAD_TBE_KERNEL, tbe_kernel);
std::vector<string> bin_file_keys;
(void)AttrUtils::GetListStr(op_desc, kStubFuncName, bin_file_keys);
if (tbe_kernel.size() != bin_file_keys.size()) {
@@ -3742,6 +3743,11 @@ Status DavinciModel::InitTbeHandleWithFfts(const OpDescPtr &op_desc) {
op_desc->GetName().c_str(), tbe_kernel.size(), bin_file_keys.size());
return INTERNAL_ERROR;
}
if (tbe_kernel.empty()) {
REPORT_INNER_ERROR("E19999", "[%s] tbe kernel is empty", op_desc->GetName().c_str());
GELOGE(INTERNAL_ERROR, "[Check][Param] [%s] tbe kernel is empty", op_desc->GetName().c_str());
return INTERNAL_ERROR;
}
size_t num = tbe_kernel.size();
GELOGD("Kernel bin num is %zu", num);
for (size_t i = 0; i < num; i++) {


+ 47
- 18
ge/graph/load/model_manager/task_info/ffts_plus_task_info.cc View File

@@ -30,6 +30,7 @@ constexpr uint32_t kTailAicCtxIndex = 1;
constexpr uint32_t kNonTailAivCtxIndex = 2;
constexpr uint32_t kTailAivCtxIndex = 3;
constexpr uint32_t kMixAicAivCtxPcNum = 4;
constexpr uint32_t kModeInArgsFirstField = 1;
}
namespace ge {
FftsPlusTaskInfo::~FftsPlusTaskInfo() {
@@ -50,7 +51,7 @@ Status FftsPlusTaskInfo::Init(const domi::TaskDef &task_def, DavinciModel *davin
if (args_size_ != 0) {
GE_CHK_RT_RET(rtMalloc(&args_, args_size_, RT_MEMORY_HBM));
}
SetAdditionalDatatoCtx(ffts_plus_task_def);
std::vector<uint8_t> sqe_buffer(sizeof(rtFftsPlusSqe_t));
auto ffts_plus_sqe = reinterpret_cast<rtFftsPlusSqe_t *>(sqe_buffer.data());
InitFftsPlusSqe(ffts_plus_task_def.ffts_plus_sqe(), ffts_plus_sqe);
@@ -125,6 +126,10 @@ Status FftsPlusTaskInfo::InitFftsPlusCtx(const domi::FftsPlusTaskDef &task_def,
}
default:
GE_CHK_STATUS_RET_NOLOG(InitHardWareCtx(ctx_def, cur_ctx));
if (ctx_def.hardware_ctx_type() == RT_HW_CTX_TYPE_AIC ||
ctx_def.hardware_ctx_type() == RT_HW_CTX_TYPE_AIV) {
GE_CHK_STATUS_RET_NOLOG(UpdateMixAicAivCtxParam(ctx_def.mix_aic_aiv_ctx(), i));
}
break;
}
}
@@ -306,11 +311,12 @@ Status FftsPlusTaskInfo::InitAicAivCtx(const domi::FftsPlusAicAivCtxDef &ctx_def
GELOGD("FftsPlusAicAivCtxDef: task param addr is %lu.", task_param_ptr_base);

const auto &rts_param = davinci_model_->GetRuntimeParam();
for (uint32_t i = 0; i < ctx->threadDim - 1; i++) {
for (uint32_t i = 0; i < static_cast<uint32_t>(ctx->threadDim - 1); i++) {
GE_CHK_STATUS_RET_NOLOG(InitIoAddrs(rts_param, ctx_def, i,
static_cast<uint32_t>(ctx_def.task_addr_offset_size())));
}
GE_CHK_STATUS_RET_NOLOG(InitIoAddrs(rts_param, ctx_def, ctx->threadDim - 1, ctx_def.input_output_count()));
GE_CHK_STATUS_RET_NOLOG(InitIoAddrs(rts_param, ctx_def, static_cast<uint32_t>(ctx->threadDim - 1),
ctx_def.input_output_count()));
int last_thread_workspace_size = ctx_def.task_addr_size() - ctx_def.task_addr_offset_size();
for (int k = 0; k < last_thread_workspace_size; ++k) {
uintptr_t logic_addr = ctx_def.task_addr(ctx_def.task_addr_offset_size() + k);
@@ -344,12 +350,8 @@ Status FftsPlusTaskInfo::InitAicAivCtx(const domi::FftsPlusAicAivCtxDef &ctx_def
i_cache_prefetch_cnt_2));
ctx->tailTaskStartPcL = static_cast<uint32_t>(reinterpret_cast<uintptr_t>(tail_task_start_pc) & 0XFFFFFFFF);
ctx->tailTaskStartPcH = static_cast<uint16_t>((reinterpret_cast<uintptr_t>(tail_task_start_pc) >> 32) & 0X0000FFFF);
if (i_cache_prefetch_cnt_1 != i_cache_prefetch_cnt_2) {
REPORT_INNER_ERROR("E19999", "i_cache_prefetch_cnt diffs in AicAivCtx");
GELOGE(INTERNAL_ERROR, "[Check][Param] i_cache_prefetch_cnt diffs in AicAivCtx");
return INTERNAL_ERROR;
}
ctx->icachePrefetchCnt = static_cast<uint16_t>(i_cache_prefetch_cnt_1 & 0X0000001F); // 5 bits, 0001,1111
uint32_t i_cache_prefetch_cnt = std::max(i_cache_prefetch_cnt_1, i_cache_prefetch_cnt_2);
ctx->icachePrefetchCnt = static_cast<uint16_t>(i_cache_prefetch_cnt & 0X0000001F); // 5 bits, 0001,1111

if (ctx_def.src_slot_size() != kSrcSlotNum) {
REPORT_INNER_ERROR("E19999", "Size of src_slot in FftsPlusAicAivCtxDef should be %d, but %d exactly",
@@ -479,11 +481,12 @@ Status FftsPlusTaskInfo::InitMixAicAivCtx(const domi::FftsPlusMixAicAivCtxDef &c
GELOGD("FftsPlusMixAicAivCtxDef: task param addr is %lu.", task_param_ptr_base);

const auto &rts_param = davinci_model_->GetRuntimeParam();
for (uint32_t i = 0; i < ctx->threadDim - 1; i++) {
for (uint32_t i = 0; i < static_cast<uint32_t>(ctx->threadDim - 1); i++) {
GE_CHK_STATUS_RET_NOLOG(InitIoAddrs(rts_param, ctx_def, i,
static_cast<uint32_t>(ctx_def.task_addr_offset_size())));
}
GE_CHK_STATUS_RET_NOLOG(InitIoAddrs(rts_param, ctx_def, ctx->threadDim - 1, ctx_def.input_output_count()));
GE_CHK_STATUS_RET_NOLOG(InitIoAddrs(rts_param, ctx_def, static_cast<uint32_t>(ctx->threadDim - 1),
ctx_def.input_output_count()));
int last_thread_workspace_size = ctx_def.task_addr_size() - ctx_def.task_addr_offset_size();
for (int k = 0; k < last_thread_workspace_size; ++k) {
uintptr_t logic_addr = ctx_def.task_addr(ctx_def.task_addr_offset_size() + k);
@@ -523,6 +526,10 @@ Status FftsPlusTaskInfo::InitMixAicAivCtx(const domi::FftsPlusMixAicAivCtxDef &c
ctx->tailAicTaskStartPcL = static_cast<uint32_t>(reinterpret_cast<uintptr_t>(tail_aic_task_start_pc) & 0XFFFFFFFF);
ctx->tailAicTaskStartPcH = static_cast<uint16_t>((reinterpret_cast<uintptr_t>(tail_aic_task_start_pc) >> 32) &
0X0000FFFF);
uint32_t aic_i_cache_prefetch_cnt = std::max(i_cache_prefetch_cnt_1, i_cache_prefetch_cnt_2);
// TODO
ctx->icachePrefetchCnt = static_cast<uint16_t>(aic_i_cache_prefetch_cnt & 0X0000001F); // 5 bits, 0001,1111

uint32_t i_cache_prefetch_cnt_3;
void *non_tail_aiv_task_start_pc = nullptr;
GE_CHK_STATUS_RET_NOLOG(davinci_model_->GetAddrAndPrefCnt(ctx_def.kernel_name(kNonTailAivCtxIndex),
@@ -538,13 +545,9 @@ Status FftsPlusTaskInfo::InitMixAicAivCtx(const domi::FftsPlusMixAicAivCtxDef &c
ctx->tailAivTaskStartPcL = static_cast<uint32_t>(reinterpret_cast<uintptr_t>(tail_aiv_task_start_pc) & 0XFFFFFFFF);
ctx->tailAivTaskStartPcH = static_cast<uint16_t>((reinterpret_cast<uintptr_t>(tail_aiv_task_start_pc) >> 32) &
0X0000FFFF);
if ((i_cache_prefetch_cnt_1 != i_cache_prefetch_cnt_2) || (i_cache_prefetch_cnt_1 != i_cache_prefetch_cnt_3) ||
(i_cache_prefetch_cnt_1 != i_cache_prefetch_cnt_4)) {
REPORT_INNER_ERROR("E19999", "i_cache_prefetch_cnt diffs in MixAicAivCtx");
GELOGE(INTERNAL_ERROR, "[Check][Param] i_cache_prefetch_cnt diffs in MixAicAivCtx");
return INTERNAL_ERROR;
}
ctx->icachePrefetchCnt = static_cast<uint16_t>(i_cache_prefetch_cnt_1 & 0X0000001F); // 5 bits, 0001,1111
uint32_t aiv_i_cache_prefetch_cnt = std::max(i_cache_prefetch_cnt_3, i_cache_prefetch_cnt_4);
// TODO
ctx->icachePrefetchCnt = static_cast<uint16_t>(aiv_i_cache_prefetch_cnt & 0X0000001F); // 5 bits, 0001,1111

if (ctx_def.src_slot_size() != kSrcSlotNum) {
REPORT_INNER_ERROR("E19999", "Size of src_slot in FftsPlusMixAicAivCtxDef should be %d, but %d exactly",
@@ -898,6 +901,32 @@ Status FftsPlusTaskInfo::Distribute() {
return SUCCESS;
}

void FftsPlusTaskInfo::SetAdditionalDatatoCtx(const domi::FftsPlusTaskDef &task_def) {
for (int i = 0; i < task_def.additional_data_size(); ++i) {
const domi::AdditionalDataDef &additionaldata = task_def.additional_data(i);
const uint32_t &data_type = additionaldata.data_type();
for (int j = 0; j < additionaldata.context_id_size(); ++j) {
ctx_additional_data_[additionaldata.context_id(j)].emplace(data_type);
}
}
}

Status FftsPlusTaskInfo::UpdateMixAicAivCtxParam(const domi::FftsPlusMixAicAivCtxDef &ctx_def, size_t ctx_idx) {
if (ctx_additional_data_.count(ctx_idx) == 0) {
GELOGD("ctx idx:%d not in ctx additional data");
return SUCCESS;
}
if (ctx_additional_data_[ctx_idx].count(kModeInArgsFirstField) == 0) {
GELOGD("ctx idx:%d need not to save mode in args first field");
return SUCCESS;
}
if (rtApp_addr_ == 0) {
GE_CHK_RT_RET(rtGetC2cCtrlAddr(&rtApp_addr_, &rtApp_data_len_));
}
GE_CHK_RT_RET(rtMemcpy(reinterpret_cast<void *>(ctx_def.aiv_task_param_ptr()), rtApp_data_len_,
reinterpret_cast<void *>(rtApp_addr_), rtApp_data_len_, RT_MEMCPY_HOST_TO_DEVICE));
return SUCCESS;
}
// task_addr = {0,200,700,1000,2000, 3500}
// task_addr_offset = {20,40,2,100,200}
template <typename T>


+ 6
- 0
ge/graph/load/model_manager/task_info/ffts_plus_task_info.h View File

@@ -57,6 +57,9 @@ class FftsPlusTaskInfo : public TaskInfo {
Status InitCaseSwitchCtx(const domi::FftsPlusCaseSwitchCtxDef &ctx_def, rtFftsPlusCaseSwitchCtx_t *&ctx);
Status InitCaseDefaultCtx(const domi::FftsPlusCaseDefaultCtxDef &ctx_def, rtFftsPlusCaseDefCtx_t *&ctx);

void SetAdditionalDatatoCtx(const domi::FftsPlusTaskDef &task_def);
Status UpdateMixAicAivCtxParam(const domi::FftsPlusMixAicAivCtxDef &ctx_def, size_t ctx_idx);

template<typename T>
Status InitIoAddrs(const RuntimeParam &rts_param, const T &aic_aiv_def, uint32_t thread_id, uint32_t addr_count);

@@ -65,6 +68,9 @@ class FftsPlusTaskInfo : public TaskInfo {
std::vector<void *> io_addrs_;
void *args_{nullptr}; // runtime args memory
uint32_t args_size_{0}; // runtime args memory length
std::map<uint32_t, std::set<uint32_t>> ctx_additional_data_;
uint64_t rtApp_addr_{0};
uint32_t rtApp_data_len_{0};
};
} // namespace ge
#endif // GE_GRAPH_LOAD_NEW_MODEL_MANAGER_TASK_INFO_FFTS_PLUS_TASK_INFO_H_

+ 1
- 1
ge/graph/partition/graph_partition.cc View File

@@ -24,7 +24,7 @@

#include "analyzer/analyzer.h"
#include "framework/common/op/ge_op_utils.h"
#include "graph/common/ge_call_wrapper.h"
#include "common/ge_call_wrapper.h"
#include "graph/utils/graph_utils.h"
#include "graph/utils/op_desc_utils.h"
#include "graph/utils/type_utils.h"


+ 1
- 1
metadef

@@ -1 +1 @@
Subproject commit 9ffed522bed359c261db1e7c8c0211077e58056c
Subproject commit 7a3798a1a5c1aa2892bfbc574abaa07120c25f6d

+ 12
- 0
tests/depends/runtime/src/runtime_stub.cc View File

@@ -475,6 +475,18 @@ rtError_t rtAicpuKernelLaunch(const rtKernelLaunchNames_t *launchNames, uint32_t
return RT_ERROR_NONE;
}

rtError_t rtGetC2cCtrlAddr(uint64_t *addr, uint32_t *len) {
return RT_ERROR_NONE;
}

rtError_t rtFftsPlusTaskLaunch(rtFftsPlusTaskInfo_t *fftsPlusTaskInfo, rtStream_t stream) {
return RT_ERROR_NONE;
}

rtError_t rtGetAddrAndPrefCntWithHandle(void *handle, const void *devFunc, void **addr, uint32_t *prefetchCnt) {
return RT_ERROR_NONE;
}

#ifdef __cplusplus
}
#endif

+ 8
- 1
tests/framework/ge_running_env/src/engine/fake_compound_optimizer.cc View File

@@ -41,10 +41,17 @@ Status FakeCompoundOptimizer::OptimizeFusedGraph(ComputeGraph& graph) {
}

const std::string &subgraph_name = "PartitionedCall_" + std::to_string(thread_scope_id_);
if (GraphUtils::BuildSubgraphWithNodes(graph, nodes, subgraph_name) == nullptr) {
const auto &subgraph = GraphUtils::BuildSubgraphWithNodes(graph, nodes, subgraph_name);
if (subgraph == nullptr) {
GELOGE(FAILED, "Build subgraph %s failed", subgraph_name.c_str());
return FAILED;
}
const auto &parent_node = subgraph->GetParentNode();
GE_CHECK_NOTNULL(parent_node);
(void)AttrUtils::SetStr(parent_node->GetOpDesc(), ATTR_NAME_FFTS_PLUS_SUB_GRAPH, subgraph_name);
for (const auto &node : subgraph->GetAllNodes()) {
(void)AttrUtils::SetInt(node->GetOpDesc(), ATTR_NAME_THREAD_SCOPE_ID, thread_scope_id_);
}

thread_scope_id_++;



+ 6
- 21
tests/st/testcase/test_ffts_plus.cc View File

@@ -33,18 +33,9 @@ using namespace std;
using namespace ge;

namespace {
bool IfNodeExistWithType(const ComputeGraphPtr &graph, const std::string &type, bool direct_node_flag) {
bool IfNodeExist(const ComputeGraphPtr &graph, std::function<bool(const NodePtr &)> filter, bool direct_node_flag = true) {
for (const auto &node : graph->GetNodes(direct_node_flag)) {
if (node->GetType() == type) {
return true;
}
}
return false;
}

bool IfNodeExistWithName(const ComputeGraphPtr &graph, const std::string &name, bool direct_node_flag) {
for (const auto &node : graph->GetNodes(direct_node_flag)) {
if (node->GetName() == name) {
if (filter(node)) {
return true;
}
}
@@ -123,10 +114,10 @@ TEST_F(TestFftsPlus, test_ffts_plus) {

CHECK_GRAPH(PreRunAfterBuild) {
// node exist
ASSERT_FALSE(IfNodeExistWithName(graph, "get_next", true));
ASSERT_FALSE(IfNodeExistWithName(graph, "add", true));
ASSERT_FALSE(IfNodeExistWithName(graph, "less", true));
ASSERT_TRUE(IfNodeExistWithType(graph, PARTITIONEDCALL, true));
ASSERT_FALSE(IfNodeExist(graph, [](const NodePtr &node) { return node->GetName() == "get_next"; }));
ASSERT_FALSE(IfNodeExist(graph, [](const NodePtr &node) { return node->GetName() == "add"; }));
ASSERT_FALSE(IfNodeExist(graph, [](const NodePtr &node) { return node->GetName() == "less"; }));
ASSERT_TRUE(IfNodeExist(graph, [](const NodePtr &node) { return node->GetType() == PARTITIONEDCALL; }));

// subgraph exit
ASSERT_EQ(graph->GetAllSubgraphs().size(), 1);
@@ -146,9 +137,6 @@ TEST_F(TestFftsPlus, test_ffts_plus) {
ASSERT_TRUE(subgraph != nullptr);
ASSERT_TRUE(IsAllNodeMatch(subgraph,
[](const NodePtr &node) {
if (node->GetOpDesc() == nullptr) {
return false;
}
return node->GetOpDesc()->HasAttr(ATTR_NAME_THREAD_SCOPE_ID);
}));
const auto &parent_node = subgraph->GetParentNode();
@@ -157,9 +145,6 @@ TEST_F(TestFftsPlus, test_ffts_plus) {
int64_t stream_id = parent_node->GetOpDesc()->GetStreamId();
ASSERT_TRUE(IsAllNodeMatch(subgraph,
[stream_id](const NodePtr &node) {
if (node->GetOpDesc() == nullptr) {
return false;
}
return node->GetOpDesc()->GetStreamId() == stream_id;
}));
};


+ 2
- 0
tests/ut/ge/CMakeLists.txt View File

@@ -245,6 +245,7 @@ set(GRAPH_DAVINCI_MODEL_SRC_FILES
"${GE_CODE_DIR}/ge/graph/load/model_manager/task_info/end_graph_task_info.cc"
"${GE_CODE_DIR}/ge/graph/load/model_manager/task_info/model_exit_task_info.cc"
"${GE_CODE_DIR}/ge/graph/load/model_manager/task_info/ffts_task_info.cc"
"${GE_CODE_DIR}/ge/graph/load/model_manager/task_info/ffts_plus_task_info.cc"
"${GE_CODE_DIR}/ge/graph/load/model_manager/task_info/super_kernel/super_kernel.cc"
"${GE_CODE_DIR}/ge/graph/load/model_manager/task_info/super_kernel/super_kernel_factory.cc"
"${GE_CODE_DIR}/ge/hybrid/node_executor/aicpu/aicpu_ext_info.cc"
@@ -533,6 +534,7 @@ set(DISTINCT_GRAPH_LOAD_TEST_FILES
"graph/load/kernel_ex_task_info_unittest.cc"
"graph/load/kernel_task_info_unittest.cc"
"graph/load/ffts_task_info_unittest.cc"
"graph/load/ffts_plus_task_info_unittest.cc"
"graph/load/memcpy_addr_async_task_info_unittest.cc"
"graph/load/memcpy_async_task_info_unittest.cc"
"graph/load/cpu_queue_schedule_unittest.cc"


+ 662
- 0
tests/ut/ge/graph/load/ffts_plus_task_info_unittest.cc View File

@@ -0,0 +1,662 @@
/**
* Copyright 2021 Huawei Technologies Co., Ltd
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/

#include <gtest/gtest.h>

#define private public
#define protected public

#include "graph/load/model_manager/task_info/ffts_plus_task_info.h"
#include "cce/aicpu_engine_struct.h"
#include "common/ge/ge_util.h"
#include "common/properties_manager.h"
#include "framework/common/debug/ge_log.h"
#include "framework/common/fmk_error_codes.h"
#include "graph/attr_value.h"
#include "graph/load/model_manager/davinci_model.h"
#include "graph/load/model_manager/model_manager.h"

namespace ge {
extern OpDescPtr CreateOpDesc(string name, string type);

class UtestFftsPlusTaskInfo : public testing::Test {
protected:
void SetUp() {}

void TearDown() {}

public:
void InitTaskSQEInfo(domi::FftsPlusTaskDef *task_def) {
domi::FftsPlusSqeDef *sqedef = task_def->mutable_ffts_plus_sqe();
//header
domi::StarsSqeHeaderDef *headerdef = sqedef->mutable_sqe_header();
headerdef->set_l1_lock(1);
headerdef->set_l1_unlock(1);
headerdef->set_block_dim(1);
//sqe
sqedef->set_pmg(1);
sqedef->set_ns(1);
sqedef->set_part_id(1);
sqedef->set_qos(1);

sqedef->set_total_context_num(2);
sqedef->set_ready_context_num(1);
sqedef->set_preload_context_num(1);

sqedef->set_dsplit_unit(1);
sqedef->set_prefetch_ost_num(1);
sqedef->set_cmaint_ost_num(1);

sqedef->set_aic_prefetch_lower(1);
sqedef->set_aic_prefetch_upper(1);
sqedef->set_aiv_prefetch_lower(1);
sqedef->set_aiv_prefetch_upper(1);
}

void InitTaskAdditionalDataInfo(domi::FftsPlusTaskDef *task_def) {
domi::AdditionalDataDef *additionaldata = task_def->add_additional_data();
additionaldata->set_data_type(1);
additionaldata->add_context_id(0);
additionaldata->add_context_id(1);
additionaldata->add_context_id(2);
domi::AdditionalDataDef *additionaldata1 = task_def->add_additional_data();
additionaldata1->set_data_type(2);
additionaldata1->add_context_id(0);
additionaldata1->add_context_id(3);
additionaldata1->add_context_id(5);
}

void InitAicAivCtx(domi::FftsPlusCtxDef *fftsplusctxdef) {
domi::FftsPlusAicAivCtxDef *ctxdef = fftsplusctxdef->mutable_aic_aiv_ctx();
ctxdef->set_successor_num(26);
ctxdef->set_aten(1);
ctxdef->set_pred_cnt_init(1);
ctxdef->set_pred_cnt(1);
for (int i = 0; i < RT_CTX_SUCCESSOR_NUM; ++i) {
ctxdef->add_successor_list(1); // 16 bits, len = 26
}
ctxdef->set_stat(1);
ctxdef->set_schem(1);
ctxdef->set_atm(1);
ctxdef->set_prefetch_enable_bitmap(1);
ctxdef->set_prefetch_once_bitmap(1);

ctxdef->set_thread_id(2);
ctxdef->set_thread_dim(4);

ctxdef->set_non_tail_block_dim(6);
ctxdef->set_tail_block_dim(5);

ctxdef->set_task_param_ptr_base(0x235689);
ctxdef->set_task_param_ptr_offset(32);

ctxdef->add_task_addr(0x125689);
ctxdef->add_task_addr_offset(32);
ctxdef->set_input_output_count(3);

ctxdef->add_kernel_name("aictest");
for (int j = 1; j < 4; ++j) {
ctxdef->add_src_slot(1); // len = 4, context ID for source data which is out of subgraph
}
}

void InitMixAicAivCtx(domi::FftsPlusCtxDef *fftsplusctxdef) {
domi::FftsPlusMixAicAivCtxDef *ctxdef = fftsplusctxdef->mutable_mix_aic_aiv_ctx();
ctxdef->set_successor_num(26);
ctxdef->set_aten(1);
ctxdef->set_pred_cnt_init(1);
ctxdef->set_pred_cnt(1);
for (int i = 1; i < RT_CTX_SUCCESSOR_NUM; ++i) {
ctxdef->add_successor_list(1); // len = 26
}
ctxdef->set_stat(1);
ctxdef->set_schem(1);
ctxdef->set_atm(1);
ctxdef->set_prefetch_enable_bitmap(1);
ctxdef->set_prefetch_once_bitmap(1);

ctxdef->set_non_tail_block_ratio_n(1);
ctxdef->set_tail_block_ratio_n(1);

ctxdef->set_thread_id(1);
ctxdef->set_thread_dim(1);

ctxdef->set_non_tail_block_dim(1);
ctxdef->set_tail_block_dim(1);

ctxdef->set_aic_task_param_ptr(1);
ctxdef->set_aic_task_param_ptr_offset(1);

ctxdef->set_aiv_task_param_ptr(0x147852);
ctxdef->set_aiv_task_param_ptr_offset(32);

ctxdef->add_kernel_name("mixaic");

ctxdef->add_task_addr(0x258745);
ctxdef->add_task_addr_offset(32);
ctxdef->set_input_output_count(1);
for (int j = 1; j < 4; ++j) {
ctxdef->add_src_slot(1); // len = 4, context ID for source data which is out of subgraph
}
}

void InitSdmaCtx(domi::FftsPlusCtxDef *fftsplusctxdef) {
domi::FftsPlusSdmaCtxDef *ctxdef = fftsplusctxdef->mutable_sdma_ctx();
ctxdef->set_successor_num(26);
ctxdef->set_aten(1);
ctxdef->set_pred_cnt_init(1);
ctxdef->set_pred_cnt(1);
for (int i = 1; i < RT_CTX_SUCCESSOR_NUM; ++i) {
ctxdef->add_successor_list(1); // len = 26
}
ctxdef->set_sat(1);
ctxdef->set_atm(1);

ctxdef->set_thread_id(1);
ctxdef->set_thread_dim(1);

ctxdef->set_sdma_sqe_header(1);

ctxdef->set_src_stream_id(1);
ctxdef->set_src_sub_stream_id(1);
ctxdef->set_dst_stream_id(1);
ctxdef->set_dst_sub_stream_id(1);

ctxdef->set_src_addr_base(0x457878);
ctxdef->set_src_addr_offset(32);
ctxdef->set_dst_addr_base(0x126547);
ctxdef->set_dst_addr_offset(32);

ctxdef->set_non_tail_data_len(1);
ctxdef->set_tail_data_len(1);
}

void InitNotifyCtx(domi::FftsPlusCtxDef *fftsplusctxdef) {
domi::FftsPlusNotifyCtxDef *ctxdef = fftsplusctxdef->mutable_notify_ctx();
ctxdef->set_successor_num(26);
ctxdef->set_aten(1);
ctxdef->set_pred_cnt_init(1);
ctxdef->set_pred_cnt(1);
for (int i = 1; i < RT_CTX_SUCCESSOR_NUM; ++i) {
ctxdef->add_successor_list(1); // len = 26
}
ctxdef->set_atm(1);

ctxdef->set_thread_id(1);
ctxdef->set_thread_dim(1);

ctxdef->set_notify_id_base(1);
}
void InitWriteValueCtx(domi::FftsPlusCtxDef *fftsplusctxdef) {
domi::FftsPlusWriteValueCtxDef *ctxdef = fftsplusctxdef->mutable_write_value_ctx();
ctxdef->set_successor_num(26);
ctxdef->set_aten(1);
ctxdef->set_pred_cnt_init(1);
ctxdef->set_pred_cnt(1);
for (int i = 1; i < RT_CTX_SUCCESSOR_NUM; ++i) {
ctxdef->add_successor_list(1); // len = 26
}
ctxdef->set_atm(1);

ctxdef->set_thread_id(1);
ctxdef->set_thread_dim(1);

ctxdef->set_aw_size(1);
ctxdef->set_snoop(1);
ctxdef->set_aw_cache(1);
ctxdef->set_aw_prot(1);
ctxdef->set_va(1);

ctxdef->set_write_addr_base(0x147852);
ctxdef->set_write_addr_offset(32);

ctxdef->add_write_value(1);
}
void InitAicpuCtxCtx(domi::FftsPlusCtxDef *fftsplusctxdef) {
domi::FftsPlusAicpuCtxDef *ctxdef = fftsplusctxdef->mutable_aicpu_ctx();
ctxdef->set_successor_num(26);
ctxdef->set_aten(1);
ctxdef->set_pred_cnt_init(1);
ctxdef->set_pred_cnt(1);
for (int j = 1; j < RT_CTX_SUCCESSOR_NUM; ++j) {
ctxdef->add_successor_context_id(1); // len = 26
}
ctxdef->set_atm(1);

ctxdef->set_sqe_index(1);
ctxdef->set_kernel_type(1);
ctxdef->set_bm(1);
ctxdef->set_topic_type(1);
ctxdef->set_qos(1);

ctxdef->set_thread_id(1);
ctxdef->set_thread_dim(1);

ctxdef->set_non_tail_block_dim(1);
ctxdef->set_tail_block_dim(1);
for (int i = 1; i < 9; ++i) {
ctxdef->add_user_data(1); // len = 9
}
ctxdef->set_sub_topic_id(1);
ctxdef->set_topic_id(1);
ctxdef->set_group_id(1);
ctxdef->set_user_data_len(64);

ctxdef->set_task_param_offset(32);
}
void InitDataCtx(domi::FftsPlusCtxDef *fftsplusctxdef) {
domi::FftsPlusDataCtxDef *ctxdef = fftsplusctxdef->mutable_data_ctx();
ctxdef->set_successor_num(26);
ctxdef->set_aten(1);
ctxdef->set_cnt_init(1);
ctxdef->set_cnt(1);
for (int i = 1; i < RT_CTX_SUCCESSOR_NUM; ++i) {
ctxdef->add_successor_list(1); // len = 26
}
ctxdef->set_atm(1);

ctxdef->set_orig_consumer_counter(1);
ctxdef->set_run_consumer_counter(1);

ctxdef->set_thread_id(1);
ctxdef->set_thread_dim(1);

ctxdef->set_addr_base(0x125478);
ctxdef->set_addr_offset(32);

ctxdef->set_non_tail_num_outter(1);
ctxdef->set_non_tail_num_inner(1);
ctxdef->set_non_tail_len_inner(1);
ctxdef->set_non_tail_stride_outter(1);
ctxdef->set_non_tail_stride_inner(1);

ctxdef->set_tail_num_outter(1);
ctxdef->set_tail_num_inner(1);
ctxdef->set_tail_len_inner(1);
ctxdef->set_tail_stride_outter(1);
ctxdef->set_tail_stride_inner(1);
}
void InitAtStartCtx(domi::FftsPlusCtxDef *fftsplusctxdef) {
domi::FftsPlusAtStartCtxDef *ctxdef = fftsplusctxdef->mutable_at_start_ctx();
ctxdef->set_successor_num(26);
ctxdef->set_aten(1);
ctxdef->set_pred_cnt_init(1);
ctxdef->set_pred_cnt(1);
for (int i = 1; i < RT_CTX_SUCCESSOR_NUM; ++i) {
ctxdef->add_successor_list(i); // len = 26
}
ctxdef->set_thread_id(1);
ctxdef->set_thread_dim(1);

ctxdef->set_thread_id_init(1);
ctxdef->set_thread_window_size(1);
}
void InitAtEndCtx(domi::FftsPlusCtxDef *fftsplusctxdef) {
domi::FftsPlusAtEndCtxDef *ctxdef = fftsplusctxdef->mutable_at_end_ctx();
ctxdef->set_at_start_slot_num(12);
ctxdef->set_out_label_slot_num(12);
ctxdef->set_aten(1);

ctxdef->set_pred_cnt_init(1);
ctxdef->set_pred_cnt(1);
for (int i = 1; i < RT_CTX_SUCC_AT_START_SLOT_NUM; ++i) {
ctxdef->add_succ_at_start_slot(i); // len = 12
ctxdef->add_succ_out_label_slot(1); // len = 12
}

ctxdef->set_thread_id(1);
}
void InitLabelCtx(domi::FftsPlusCtxDef *fftsplusctxdef) {
domi::FftsPlusLabelCtxDef *ctxdef = fftsplusctxdef->mutable_label_ctx();
ctxdef->set_successor_num(26);
ctxdef->set_pred_cnt_init(1);
ctxdef->set_pred_cnt(1);
for (int i = 1; i < RT_CTX_SUCCESSOR_NUM; ++i) {
ctxdef->add_successor_list(1); // len = 26
}
}
void InitCaseSwitchCtx(domi::FftsPlusCtxDef *fftsplusctxdef) {
domi::FftsPlusCaseSwitchCtxDef *ctxdef = fftsplusctxdef->mutable_case_switch_ctx();
ctxdef->set_successor_num(26);
ctxdef->set_aten(32);
ctxdef->set_start_label_id(32);
ctxdef->set_label_list_len(32);
ctxdef->set_pred_cnt_init(32);
ctxdef->set_pred_cnt(32);
for (int i = 1; i < RT_CTX_SUCCESSOR_NUM; ++i) {
ctxdef->add_successor_list(1); // len = 26
}
ctxdef->set_atm(32);

ctxdef->set_thread_id(32);
ctxdef->set_thread_dim(32);

ctxdef->set_ar_size(32);
ctxdef->set_snoop(32);
ctxdef->set_ar_cache(32);
ctxdef->set_ar_prot(32);
ctxdef->set_va(32);

ctxdef->set_load_addr0_base(0x123456);
ctxdef->set_ld0_en(32);
ctxdef->set_load_addr0_offset(32);

ctxdef->set_load_addr1_base(0x12457);
ctxdef->set_ld1_en(32);
ctxdef->set_load_addr1_offset(32);
}
void InitCaseDefaultCtx(domi::FftsPlusCtxDef *fftsplusctxdef) {
domi::FftsPlusCaseDefaultCtxDef *ctxdef = fftsplusctxdef->mutable_case_default_ctx();
ctxdef->set_successor_num(26);
ctxdef->set_aten(32);
ctxdef->set_start_label_id(1);
ctxdef->set_label_list_len(32);
ctxdef->set_pred_cnt_init(1);
ctxdef->set_pred_cnt(32);
for (int i = 1; i < RT_CTX_SUCCESSOR_NUM; ++i) {
ctxdef->add_successor_list(2); // len = 26
}
}
void InitCondSwitchCtx(domi::FftsPlusCtxDef *fftsplusctxdef) {
domi::FftsPlusCondSwitchCtxDef *ctxdef = fftsplusctxdef->mutable_cond_switch_ctx();
ctxdef->set_true_successor_num(12);
ctxdef->set_false_successor_num(14);
ctxdef->set_aten(32);

ctxdef->set_condition(32);
ctxdef->set_pred_cnt_init(32);
ctxdef->set_pred_cnt(32);

for (int i = 1; i < RT_CTX_FALSE_SUCCESSOR_NUM; ++i) {
if (i < RT_CTX_TRUE_SUCCESSOR_NUM) {
ctxdef->add_true_successor_list(1); // len = 12
}
ctxdef->add_false_successor_list(1); // len = 14
}
ctxdef->set_atm(32);

ctxdef->set_thread_id(1);
ctxdef->set_thread_dim(32);

ctxdef->set_ar_size(32);
ctxdef->set_snoop(32);
ctxdef->set_ar_cache(32);
ctxdef->set_ar_prot(32);
ctxdef->set_va(32);

ctxdef->set_load_addr0_base(0x142545);
ctxdef->set_ld0_en(32);
ctxdef->set_load_addr0_offset(32);

ctxdef->set_load_addr1_base(0x365451);
ctxdef->set_ld1_en(64);
ctxdef->set_load_addr1_offset(32);

ctxdef->set_cmp_value_1(1);
ctxdef->set_cmp_value_2(1);
}
};

// test FftsPlusTaskInfo Init software ctx
TEST_F(UtestFftsPlusTaskInfo, success_ffts_plus_task_info_software_ctx) {
DavinciModel davinci_model(0, nullptr);
rtStream_t stream = nullptr;
rtStreamCreate(&stream, 0);
davinci_model.stream_list_ = { stream };
domi::TaskDef task_def;
task_def.set_stream_id(0);

domi::FftsPlusTaskDef *ffts_plus_task_def = task_def.mutable_ffts_plus_task();
FftsPlusTaskInfo ffts_plus_task_info;
// init failed when model without op_desc
EXPECT_EQ(ffts_plus_task_info.Init(task_def, &davinci_model), PARAM_INVALID);

davinci_model.op_list_[0] = CreateOpDesc("test", PARTITIONEDCALL);
ffts_plus_task_def->set_op_index(0);
ffts_plus_task_def->set_addr_size(2);
rtFftsPlusTaskInfo_t sub_task_info;
ffts_plus_task_info.ffts_plus_task_info_ = sub_task_info;
ffts_plus_task_info.io_addrs_ = { (void*)0x12345678, (void*)0x22345678 };

InitTaskSQEInfo(ffts_plus_task_def);
InitTaskAdditionalDataInfo(ffts_plus_task_def);

domi::FftsPlusCtxDef *startctx = ffts_plus_task_def->add_ffts_plus_ctx();
startctx->set_op_index(0);
startctx->set_hardware_ctx_type(0);
startctx->set_software_ctx_type(static_cast<uint32_t>(RT_SOFT_CTX_TYPE_AT_START));
InitAtStartCtx(startctx);

EXPECT_EQ(ffts_plus_task_info.Init(task_def, &davinci_model), FAILED);
startctx->at_start_ctx().add_successor_list(1);
EXPECT_EQ(ffts_plus_task_info.Init(task_def, &davinci_model), SUCCESS);

domi::FftsPlusCtxDef *endctx = ffts_plus_task_def->add_ffts_plus_ctx();
endctx->set_op_index(0);
endctx->set_hardware_ctx_type(0);
endctx->set_software_ctx_type(static_cast<uint32_t>(RT_SOFT_CTX_TYPE_AT_END));
InitAtEndCtx(endctx);

EXPECT_EQ(ffts_plus_task_info.Init(task_def, &davinci_model), FAILED);
endctx->at_end_ctx().add_succ_at_start_slot(1);
EXPECT_EQ(ffts_plus_task_info.Init(task_def, &davinci_model), FAILED);
endctx->at_end_ctx().add_succ_out_label_slot(1);
EXPECT_EQ(ffts_plus_task_info.Init(task_def, &davinci_model), SUCCESS);

domi::FftsPlusCtxDef *labelctx = ffts_plus_task_def->add_ffts_plus_ctx();
labelctx->set_op_index(0);
labelctx->set_hardware_ctx_type(0);
labelctx->set_software_ctx_type(static_cast<uint32_t>(RT_SOFT_CTX_TYPE_LABEL));
InitLabelCtx(labelctx);
EXPECT_EQ(ffts_plus_task_info.Init(task_def, &davinci_model), FAILED);
labelctx->label_ctx().add_successor_list(1);
EXPECT_EQ(ffts_plus_task_info.Init(task_def, &davinci_model), SUCCESS);
}

// test FftsPlusTaskInfo Init hardware ctx
TEST_F(UtestFftsPlusTaskInfo, success_ffts_plus_task_info_hardware_ctx) {
DavinciModel davinci_model(0, nullptr);
domi::TaskDef task_def;
FftsPlusTaskInfo task_info;
rtStream_t stream = nullptr;
rtStreamCreate(&stream, 0);
davinci_model.stream_list_ = { stream };

task_def.set_stream_id(0);

domi::FftsPlusTaskDef *ffts_plus_task_def = task_def.mutable_ffts_plus_task();
rtFftsPlusTaskInfo_t sub_task_info;
task_info.ffts_plus_task_info_ = sub_task_info;

davinci_model.op_list_[0] = CreateOpDesc("test", PARTITIONEDCALL);
ffts_plus_task_def->set_op_index(0);
ffts_plus_task_def->set_addr_size(2);
InitTaskSQEInfo(ffts_plus_task_def);
InitTaskAdditionalDataInfo(ffts_plus_task_def);

domi::FftsPlusCtxDef *aicaivctx = ffts_plus_task_def->add_ffts_plus_ctx();
aicaivctx->set_op_index(0);
aicaivctx->set_hardware_ctx_type(static_cast<uint32_t>(RT_HW_CTX_TYPE_AIV));
aicaivctx->set_software_ctx_type(0);
InitAicAivCtx(aicaivctx);
EXPECT_EQ(task_info.Init(task_def, &davinci_model), FAILED);
aicaivctx->aic_aiv_ctx().add_successor_list(1);
EXPECT_EQ(task_info.Init(task_def, &davinci_model), FAILED);
aicaivctx->aic_aiv_ctx().add_kernel_name("aivtest");
EXPECT_EQ(task_info.Init(task_def, &davinci_model), FAILED);
aicaivctx->aic_aiv_ctx().add_src_slot(1);
EXPECT_EQ(task_info.Init(task_def, &davinci_model), SUCCESS);
domi::FftsPlusCtxDef *mixaicaivctx = ffts_plus_task_def->add_ffts_plus_ctx();
mixaicaivctx->set_op_index(0);
mixaicaivctx->set_hardware_ctx_type(static_cast<uint32_t>(RT_HW_CTX_TYPE_MIX_AIC));
mixaicaivctx->set_software_ctx_type(0);
InitMixAicAivCtx(mixaicaivctx);

EXPECT_EQ(task_info.Init(task_def, &davinci_model), FAILED);
mixaicaivctx->mix_aic_aiv_ctx().add_successor_list(1);
EXPECT_EQ(task_info.Init(task_def, &davinci_model), FAILED);
mixaicaivctx->mix_aic_aiv_ctx().add_kernel_name("mixaiv");
EXPECT_EQ(task_info.Init(task_def, &davinci_model), FAILED);
mixaicaivctx->mix_aic_aiv_ctx().add_src_slot(1);
EXPECT_EQ(task_info.Init(task_def, &davinci_model), SUCCESS);

domi::FftsPlusCtxDef *notifyctx = ffts_plus_task_def->add_ffts_plus_ctx();
notifyctx->set_op_index(0);
notifyctx->set_hardware_ctx_type(static_cast<uint32_t>(RT_HW_CTX_TYPE_NOTIFY_WAIT));
notifyctx->set_software_ctx_type(0);
InitNotifyCtx(notifyctx);

EXPECT_EQ(task_info.Init(task_def, &davinci_model), FAILED);
notifyctx->notify_ctx().add_successor_list(1);
EXPECT_EQ(task_info.Init(task_def, &davinci_model), SUCCESS);

domi::FftsPlusCtxDef *sdmactx = ffts_plus_task_def->add_ffts_plus_ctx();
sdmactx->set_op_index(0);
sdmactx->set_hardware_ctx_type(static_cast<uint32_t>(RT_HW_CTX_TYPE_SDMA));
sdmactx->set_software_ctx_type(0);
InitSdmaCtx(sdmactx);

EXPECT_EQ(task_info.Init(task_def, &davinci_model), FAILED);
sdmactx->sdma_ctx().add_successor_list(1);
EXPECT_EQ(task_info.Init(task_def, &davinci_model), SUCCESS);

domi::FftsPlusCtxDef *writevalctx = ffts_plus_task_def->add_ffts_plus_ctx();
writevalctx->set_op_index(0);
writevalctx->set_hardware_ctx_type(static_cast<uint32_t>(RT_HW_CTX_TYPE_WRITE_VALUE));
writevalctx->set_software_ctx_type(0);
InitWriteValueCtx(writevalctx);

EXPECT_EQ(task_info.Init(task_def, &davinci_model), FAILED);
writevalctx->write_value_ctx().add_successor_list(1);
EXPECT_EQ(task_info.Init(task_def, &davinci_model), SUCCESS);

domi::FftsPlusCtxDef *aicpuctx = ffts_plus_task_def->add_ffts_plus_ctx();
aicpuctx->set_op_index(0);
aicpuctx->set_hardware_ctx_type(static_cast<uint32_t>(RT_HW_CTX_TYPE_AICPU));
aicpuctx->set_software_ctx_type(0);
InitAicpuCtxCtx(aicpuctx);

EXPECT_EQ(task_info.Init(task_def, &davinci_model), FAILED);
aicpuctx->aicpu_ctx().add_successor_context_id(1);
EXPECT_EQ(task_info.Init(task_def, &davinci_model), FAILED);
aicpuctx->aicpu_ctx().add_user_data(1);
EXPECT_EQ(task_info.Init(task_def, &davinci_model), SUCCESS);

domi::FftsPlusCtxDef *datactx = ffts_plus_task_def->add_ffts_plus_ctx();
datactx->set_op_index(0);
datactx->set_hardware_ctx_type(static_cast<uint32_t>(RT_HW_CTX_TYPE_FLUSH_DATA));
datactx->set_software_ctx_type(0);
InitDataCtx(datactx);

EXPECT_EQ(task_info.Init(task_def, &davinci_model), FAILED);
datactx->data_ctx().add_successor_list(1);
EXPECT_EQ(task_info.Init(task_def, &davinci_model), SUCCESS);

domi::FftsPlusCtxDef *caseswitchctx = ffts_plus_task_def->add_ffts_plus_ctx();
caseswitchctx->set_op_index(0);
caseswitchctx->set_hardware_ctx_type(static_cast<uint32_t>(RT_HW_CTX_TYPE_LOAD));
caseswitchctx->set_software_ctx_type(static_cast<uint32_t>(RT_SOFT_CTX_TYPE_CASE_SWITCH));
InitCaseSwitchCtx(caseswitchctx);

EXPECT_EQ(task_info.Init(task_def, &davinci_model), FAILED);
caseswitchctx->case_switch_ctx().add_successor_list(1);
EXPECT_EQ(task_info.Init(task_def, &davinci_model), SUCCESS);

domi::FftsPlusCtxDef *candswitchctx = ffts_plus_task_def->add_ffts_plus_ctx();
candswitchctx->set_op_index(0);
candswitchctx->set_hardware_ctx_type(static_cast<uint32_t>(RT_HW_CTX_TYPE_LOAD));
candswitchctx->set_software_ctx_type(static_cast<uint32_t>(RT_SOFT_CTX_TYPE_COND_SWITCH));
InitCondSwitchCtx(candswitchctx);
EXPECT_EQ(task_info.Init(task_def, &davinci_model), FAILED);
candswitchctx->cond_switch_ctx().add_true_successor_list(1);
EXPECT_EQ(task_info.Init(task_def, &davinci_model), FAILED);
candswitchctx->cond_switch_ctx().add_false_successor_list(1);
EXPECT_EQ(task_info.Init(task_def, &davinci_model), SUCCESS);
}

// test FftsPlusTaskInfo Init hardware ctx
TEST_F(UtestFftsPlusTaskInfo, success_ffts_plus_task_info_hardware_ctx_ex) {
DavinciModel davinci_model(0, nullptr);
domi::TaskDef task_def;
FftsPlusTaskInfo task_info;
rtStream_t stream = nullptr;
rtStreamCreate(&stream, 0);
davinci_model.stream_list_ = { stream };

task_def.set_stream_id(0);

domi::FftsPlusTaskDef *ffts_plus_task_def = task_def.mutable_ffts_plus_task();
rtFftsPlusTaskInfo_t sub_task_info;
task_info.ffts_plus_task_info_ = sub_task_info;

davinci_model.op_list_[0] = CreateOpDesc("test", PARTITIONEDCALL);
ffts_plus_task_def->set_op_index(0);
ffts_plus_task_def->set_addr_size(2);
InitTaskSQEInfo(ffts_plus_task_def);
InitTaskAdditionalDataInfo(ffts_plus_task_def);

domi::FftsPlusCtxDef *casesdefaultctx = ffts_plus_task_def->add_ffts_plus_ctx();
casesdefaultctx->set_op_index(0);
casesdefaultctx->set_hardware_ctx_type(static_cast<uint32_t>(RT_HW_CTX_TYPE_LOAD));
casesdefaultctx->set_software_ctx_type(static_cast<uint32_t>(RT_SOFT_CTX_TYPE_CASE_SWITCH));
InitCaseDefaultCtx(casesdefaultctx);

EXPECT_EQ(task_info.Init(task_def, &davinci_model), FAILED);
casesdefaultctx->case_default_ctx().add_successor_list(1);
EXPECT_EQ(task_info.Init(task_def, &davinci_model), SUCCESS);
}
// test FftsPlusTaskInfo UpdateArgs
TEST_F(UtestFftsPlusTaskInfo, success_ffts_plus_task_info_update_args) {
DavinciModel davinci_model(0, nullptr);
FftsPlusTaskInfo task_info;
task_info.davinci_model_ = &davinci_model;
task_info.io_addrs_ = { (void*)0x12345678, (void*)0x22345678 };
EXPECT_EQ(task_info.UpdateArgs(), SUCCESS);
}

// test FftsPlusTaskInfo CalculateArgs
TEST_F(UtestFftsPlusTaskInfo, success_ffts_plus_task_info_calculate_args) {
DavinciModel davinci_model(0, nullptr);
domi::TaskDef task_def;
FftsPlusTaskInfo task_info;
EXPECT_EQ(task_info.CalculateArgs(task_def, &davinci_model), SUCCESS);
}

// test FftsPlusTaskInfo Distribute
TEST_F(UtestFftsPlusTaskInfo, success_ffts_plus_task_info_distribute) {
DavinciModel davinci_model(0, nullptr);
FftsPlusTaskInfo task_info;
rtFftsPlusTaskInfo_t sub_task_info;
task_info.ffts_plus_task_info_ = sub_task_info;
rtStream_t stream = nullptr;
rtStreamCreate(&stream, 0);
task_info.stream_ = stream;
EXPECT_EQ(task_info.Distribute(), SUCCESS);
}
} // namespace ge

+ 1
- 1
third_party/fwkacllib/inc/runtime/rt_ffts.h View File

@@ -178,7 +178,7 @@ typedef struct tagFftsTaskInfo {
} rtFftsTaskInfo_t;

RTS_API rtError_t rtFftsTaskLaunch(rtFftsTaskInfo_t *fftsTaskInfo, rtStream_t stream);
RTS_API rtError_t rtGetC2cCtrlAddr(uint64_t *addr, uint32_t *len);
#if defined(__cplusplus) && !defined(COMPILE_OMG_PACKAGE)
}
#endif


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