253 Commits (v1.2.0)

Author SHA1 Message Date
  zhangxiaokun c193588e2f Rename new_model_manager to model_manager. 4 years ago
  chenyemeng a3114f023d cache support 4 years ago
  zhou_lili d75417c9d4 action of remove const data has be done by 4 years ago
  mindspore-ci-bot bc0fd616c4 !948 session_id_pid_prefix 4 years ago
  wangxiaotian22 ebe407e79f gensessionid add pid prefix 4 years ago
  zhou_lili 0db227b67f add check of ut 4 years ago
  zhou_lili 8ad9ea921a add check of ut 4 years ago
  mindspore-ci-bot ab736fc748 !895 add fuse same data pass for online infer dynamic dims 4 years ago
  zhou_lili 6f10a03c59 fix infer time and mem when online infer dynamic 4 years ago
  mindspore-ci-bot d4adceee5c !823 Add submodelId in dynamic shape 4 years ago
  mindspore-ci-bot 09e5439215 !880 Eliminate variable_op_list_ 4 years ago
  zhangxiaokun 2e34ed1acd Fix UT 4 years ago
  zhangxiaokun 501111b020 Eliminate variable_op_list_ 4 years ago
  zhangxiaokun b0cbef78fc Eliminate variable_op_list_ 4 years ago
  chenyemeng 668457ec9c Fix UT 4 years ago
  zhangxiaokun 3ae1554141 Eliminate variable_op_list_ 4 years ago
  chenyemeng 0ad4302f4e rm compile macro 4 years ago
  chenyemeng 46ea5518d1 rm compile macro 4 years ago
  chenyemeng 04105fb40f rm compile macro 4 years ago
  chenyemeng be2a31e228 rm macro 4 years ago
  chenyemeng f95efe48a3 rm compile macro 4 years ago
  zhangxiaokun 6ce14620cc Eliminate data_op_list_ 4 years ago
  zhou_lili dd6996e2e9 change switchn to case and add ut 4 years ago
  mindspore-ci-bot 6009e647a7 !836 Custom pass register. 4 years ago
  mindspore-ci-bot 84b53f3f99 !842 Fix dynamic GetNext 4 years ago
  zhangxiaokun 5bedbf9696 Add UT 4 years ago
  mindspore-ci-bot 12dcf84615 !818 Memory optimization during model loading 4 years ago
  taoxiangdong 06499aaf2f add submodel id in dynamic shape 4 years ago
  unknown af230762e1 Custom pass register. 4 years ago
  mindspore-ci-bot 8c222e4cb5 !808 Free mem before return 4 years ago
  wangxiaotian22 6d94878eaf fix ut 4 years ago
  wangxiaotian22 610828561c fill ut 4 years ago
  taoxiangdong 7d336c66a6 Free memory before return 4 years ago
  lwx897429 e0a5b21daa Memory optimization during model loading 4 years ago
  mindspore-ci-bot 7b90d6ed56 !814 add macro 4 years ago
  mindspore-ci-bot c8ceb4b8fc !812 Feature:display model info 4 years ago
  chenyemeng ef922e7c00 add macro 4 years ago
  chenyemeng c47a89e236 add macro 4 years ago
  chenyemeng f9b4ae65fc add macro 4 years ago
  chenyemeng 3f610d914b add macro 4 years ago
  chenyemeng f5bca22f53 add macro 4 years ago
  chenyemeng d986f9aa5e add macro 4 years ago
  zhangxiaokun c22b0ebe9f Eliminate output_op_list_ 4 years ago
  wangwenhua1@huawei.com e3063461eb display model info 4 years ago
  mindspore-ci-bot b65e4eb25f !772 GeTensor aligned addr & zero copy support 4 years ago
  mindspore-ci-bot bc193c83fc !754 Parse training trace switch in profstart 4 years ago
  mindspore-ci-bot e15e2d9378 !773 broadcast in train graph related 4 years ago
  wangwenhua1@huawei.com f594b6370b display model info 4 years ago
  weiyang 6cf3a44a9f dynamic shape 4 years ago
  wangxiaotian22 dacc0a16a1 fix ut fail 4 years ago